diff options
| author | Sagar Ghuge <[email protected]> | 2019-10-15 14:13:29 -0700 |
|---|---|---|
| committer | Sagar Ghuge <[email protected]> | 2019-10-29 14:46:15 -0700 |
| commit | f0db4c5204f9cf83075bbaafc9be0a2a9560d18c (patch) | |
| tree | def28df6eabafd3c70215a93f547949af447818b | |
| parent | b22b3494430e40fcdeee0ea30c2af85d7d7b9c39 (diff) | |
intel/isl: Allow stencil buffer to support compression on Gen12+
v2: (Nanley Chery)
- Fix commit title
- Fix comment
Signed-off-by: Sagar Ghuge <[email protected]>
Reviewed-by: Nanley Chery <[email protected]>
| -rw-r--r-- | src/intel/isl/isl.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 7ca2dc7809b..7c0d3c4dacd 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -1858,8 +1858,9 @@ isl_surf_get_ccs_surf(const struct isl_device *dev, if (surf->usage & ISL_SURF_USAGE_DISABLE_AUX_BIT) return false; - /* Callers don't yet support this configuration. */ - if (isl_surf_usage_is_stencil(surf->usage)) + /* Allow CCS for single-sampled stencil buffers Gen12+. */ + if (isl_surf_usage_is_stencil(surf->usage) && + (ISL_DEV_GEN(dev) < 12 || surf->samples > 1)) return false; /* [TGL+] CCS can only be added to a non-D16-formatted depth buffer if it |