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authorJason Ekstrand <[email protected]>2017-11-02 18:32:39 -0700
committerJason Ekstrand <[email protected]>2017-11-07 10:41:24 -0800
commitdee58ecd2e3b23d1a3d2cdffb99d3dd314421b39 (patch)
tree622cdf1034f3abea4e0eb5ce418a492b37574e03
parent9bb34892bf99a6f2285f792519f51cefe5c219ee (diff)
intel/fs/nir: Use Q immediates for load_const on gen8+
Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
-rw-r--r--src/intel/compiler/brw_fs_nir.cpp14
1 files changed, 11 insertions, 3 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 99e652a4a0c..342ac8170b0 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -1442,9 +1442,17 @@ fs_visitor::nir_emit_load_const(const fs_builder &bld,
break;
case 64:
- for (unsigned i = 0; i < instr->def.num_components; i++)
- bld.MOV(offset(reg, bld, i),
- setup_imm_df(bld, instr->value.f64[i]));
+ assert(devinfo->gen >= 7);
+ if (devinfo->gen == 7) {
+ /* We don't get 64-bit integer types until gen8 */
+ for (unsigned i = 0; i < instr->def.num_components; i++) {
+ bld.MOV(retype(offset(reg, bld, i), BRW_REGISTER_TYPE_DF),
+ setup_imm_df(bld, instr->value.f64[i]));
+ }
+ } else {
+ for (unsigned i = 0; i < instr->def.num_components; i++)
+ bld.MOV(offset(reg, bld, i), brw_imm_q(instr->value.i64[i]));
+ }
break;
default: