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authorEric Anholt <[email protected]>2009-06-23 19:29:35 -0700
committerEric Anholt <[email protected]>2009-06-23 19:31:13 -0700
commitd43599afef046a36ae75a29eaea941eb04929abf (patch)
treebe29bab17464a9ed574d280a7a6351a8ca56a914
parent5ca800e1006555ea1c5dcbbc56c35838c9f04994 (diff)
i965: Don't set a reserved bit in MI_FLUSH.
I noticed this when this MI_FLUSH showed up in IPEHR for the ut2004 hang. Not setting the reserved bit didn't help, though.
-rw-r--r--src/mesa/drivers/dri/i965/brw_vtbl.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c
index ba03afd6c13..b284e623d01 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -194,7 +194,7 @@ static GLuint brw_flush_cmd( void )
struct brw_mi_flush flush;
flush.opcode = CMD_MI_FLUSH;
flush.pad = 0;
- flush.flags = BRW_FLUSH_READ_CACHE | BRW_FLUSH_STATE_CACHE;
+ flush.flags = BRW_FLUSH_STATE_CACHE;
return *(GLuint *)&flush;
}