summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorJason Ekstrand <[email protected]>2017-11-03 15:20:08 -0700
committerJason Ekstrand <[email protected]>2017-11-13 19:40:10 -0800
commitbc933d0e8462871e19328f66182c35543e334013 (patch)
tree1d4bc129dc020daa81e97a8fb5fa7b0c33086f35
parentdeec84fd771876b5c0755293376df11bc95b473b (diff)
intel/blorp: Make the MOCS setting part of blorp_address
This makes our MOCS settings significantly more flexible. Cc: "17.3" <[email protected]> Tested-by: Lyude Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
-rw-r--r--src/intel/blorp/blorp.h7
-rw-r--r--src/intel/blorp/blorp_genX_exec.h16
-rw-r--r--src/intel/vulkan/anv_blorp.c12
-rw-r--r--src/intel/vulkan/genX_blorp_exec.c1
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.c31
-rw-r--r--src/mesa/drivers/dri/i965/genX_blorp_exec.c10
6 files changed, 44 insertions, 33 deletions
diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
index 9716c663021..31eb1ece0ff 100644
--- a/src/intel/blorp/blorp.h
+++ b/src/intel/blorp/blorp.h
@@ -45,12 +45,6 @@ struct blorp_context {
const struct brw_compiler *compiler;
- struct {
- uint32_t tex;
- uint32_t rb;
- uint32_t vb;
- } mocs;
-
bool (*lookup_shader)(struct blorp_context *blorp,
const void *key, uint32_t key_size,
uint32_t *kernel_out, void *prog_data_out);
@@ -94,6 +88,7 @@ struct blorp_address {
void *buffer;
unsigned reloc_flags;
uint32_t offset;
+ uint32_t mocs;
};
struct blorp_surf
diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index ccbfe5199f7..3dd4bb76af2 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -269,7 +269,7 @@ blorp_emit_vertex_buffers(struct blorp_batch *batch,
vb[0].VertexBufferIndex = 0;
vb[0].BufferPitch = 3 * sizeof(float);
#if GEN_GEN >= 6
- vb[0].VertexBufferMOCS = batch->blorp->mocs.vb;
+ vb[0].VertexBufferMOCS = vb[0].BufferStartingAddress.mocs;
#endif
#if GEN_GEN >= 7
vb[0].AddressModifyEnable = true;
@@ -290,7 +290,7 @@ blorp_emit_vertex_buffers(struct blorp_batch *batch,
vb[1].VertexBufferIndex = 1;
vb[1].BufferPitch = 0;
#if GEN_GEN >= 6
- vb[1].VertexBufferMOCS = batch->blorp->mocs.vb;
+ vb[1].VertexBufferMOCS = vb[1].BufferStartingAddress.mocs;
#endif
#if GEN_GEN >= 7
vb[1].AddressModifyEnable = true;
@@ -1235,13 +1235,11 @@ blorp_emit_surface_state(struct blorp_batch *batch,
write_disable_mask |= ISL_CHANNEL_ALPHA_BIT;
}
- const uint32_t mocs =
- is_render_target ? batch->blorp->mocs.rb : batch->blorp->mocs.tex;
-
isl_surf_fill_state(batch->blorp->isl_dev, state,
.surf = &surf, .view = &surface->view,
.aux_surf = &surface->aux_surf, .aux_usage = aux_usage,
- .mocs = mocs, .clear_color = surface->clear_color,
+ .mocs = surface->addr.mocs,
+ .clear_color = surface->clear_color,
.write_disables = write_disable_mask);
blorp_surface_reloc(batch, state_offset + isl_dev->ss.addr_offset,
@@ -1363,14 +1361,14 @@ blorp_emit_depth_stencil_config(struct blorp_batch *batch,
if (dw == NULL)
return;
- struct isl_depth_stencil_hiz_emit_info info = {
- .mocs = batch->blorp->mocs.tex,
- };
+ struct isl_depth_stencil_hiz_emit_info info = { };
if (params->depth.enabled) {
info.view = &params->depth.view;
+ info.mocs = params->depth.addr.mocs;
} else if (params->stencil.enabled) {
info.view = &params->stencil.view;
+ info.mocs = params->stencil.addr.mocs;
}
if (params->depth.enabled) {
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 671a9e7c9c0..7fc6958f22d 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -92,9 +92,6 @@ anv_device_init_blorp(struct anv_device *device)
anv_pipeline_cache_init(&device->blorp_shader_cache, device, true);
blorp_init(&device->blorp, device, &device->isl_dev);
device->blorp.compiler = device->instance->physicalDevice.compiler;
- device->blorp.mocs.tex = device->default_mocs;
- device->blorp.mocs.rb = device->default_mocs;
- device->blorp.mocs.vb = device->default_mocs;
device->blorp.lookup_shader = lookup_blorp_shader;
device->blorp.upload_shader = upload_blorp_shader;
switch (device->info.gen) {
@@ -156,6 +153,7 @@ get_blorp_surf_for_anv_buffer(struct anv_device *device,
.addr = {
.buffer = buffer->bo,
.offset = buffer->offset + offset,
+ .mocs = device->default_mocs,
},
};
@@ -199,6 +197,7 @@ get_blorp_surf_for_anv_image(const struct anv_device *device,
.addr = {
.buffer = image->planes[plane].bo,
.offset = image->planes[plane].bo_offset + surface->offset,
+ .mocs = device->default_mocs,
},
};
@@ -208,6 +207,7 @@ get_blorp_surf_for_anv_image(const struct anv_device *device,
blorp_surf->aux_addr = (struct blorp_address) {
.buffer = image->planes[plane].bo,
.offset = image->planes[plane].bo_offset + aux_surface->offset,
+ .mocs = device->default_mocs,
};
blorp_surf->aux_usage = aux_usage;
}
@@ -607,10 +607,12 @@ void anv_CmdCopyBuffer(
struct blorp_address src = {
.buffer = src_buffer->bo,
.offset = src_buffer->offset + pRegions[r].srcOffset,
+ .mocs = cmd_buffer->device->default_mocs,
};
struct blorp_address dst = {
.buffer = dst_buffer->bo,
.offset = dst_buffer->offset + pRegions[r].dstOffset,
+ .mocs = cmd_buffer->device->default_mocs,
};
blorp_buffer_copy(&batch, src, dst, pRegions[r].size);
@@ -658,10 +660,12 @@ void anv_CmdUpdateBuffer(
struct blorp_address src = {
.buffer = &cmd_buffer->device->dynamic_state_pool.block_pool.bo,
.offset = tmp_data.offset,
+ .mocs = cmd_buffer->device->default_mocs,
};
struct blorp_address dst = {
.buffer = dst_buffer->bo,
.offset = dst_buffer->offset + dstOffset,
+ .mocs = cmd_buffer->device->default_mocs,
};
blorp_buffer_copy(&batch, src, dst, copy_size);
@@ -1595,6 +1599,7 @@ anv_image_copy_to_shadow(struct anv_cmd_buffer *cmd_buffer,
.buffer = image->planes[0].bo,
.offset = image->planes[0].bo_offset +
image->planes[0].shadow_surface.offset,
+ .mocs = cmd_buffer->device->default_mocs,
},
};
@@ -1656,6 +1661,7 @@ anv_gen8_hiz_op_resolve(struct anv_cmd_buffer *cmd_buffer,
.buffer = image->planes[0].bo,
.offset = image->planes[0].bo_offset +
image->planes[0].aux_surface.offset,
+ .mocs = cmd_buffer->device->default_mocs,
};
surf.aux_usage = ISL_AUX_USAGE_HIZ;
diff --git a/src/intel/vulkan/genX_blorp_exec.c b/src/intel/vulkan/genX_blorp_exec.c
index f041fc71b55..b4b05c7022a 100644
--- a/src/intel/vulkan/genX_blorp_exec.c
+++ b/src/intel/vulkan/genX_blorp_exec.c
@@ -134,6 +134,7 @@ blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size,
*addr = (struct blorp_address) {
.buffer = &cmd_buffer->device->dynamic_state_pool.block_pool.bo,
.offset = vb_state.offset,
+ .mocs = cmd_buffer->device->default_mocs,
};
return vb_state.map;
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index 58e1f8a09f3..5a86af8b4ac 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -88,15 +88,9 @@ brw_blorp_init(struct brw_context *brw)
brw->blorp.exec = gen5_blorp_exec;
break;
case 6:
- brw->blorp.mocs.tex = 0;
- brw->blorp.mocs.rb = 0;
- brw->blorp.mocs.vb = 0;
brw->blorp.exec = gen6_blorp_exec;
break;
case 7:
- brw->blorp.mocs.tex = GEN7_MOCS_L3;
- brw->blorp.mocs.rb = GEN7_MOCS_L3;
- brw->blorp.mocs.vb = GEN7_MOCS_L3;
if (devinfo->is_haswell) {
brw->blorp.exec = gen75_blorp_exec;
} else {
@@ -104,21 +98,12 @@ brw_blorp_init(struct brw_context *brw)
}
break;
case 8:
- brw->blorp.mocs.tex = BDW_MOCS_WB;
- brw->blorp.mocs.rb = BDW_MOCS_PTE;
- brw->blorp.mocs.vb = BDW_MOCS_WB;
brw->blorp.exec = gen8_blorp_exec;
break;
case 9:
- brw->blorp.mocs.tex = SKL_MOCS_WB;
- brw->blorp.mocs.rb = SKL_MOCS_PTE;
- brw->blorp.mocs.vb = SKL_MOCS_WB;
brw->blorp.exec = gen9_blorp_exec;
break;
case 10:
- brw->blorp.mocs.tex = CNL_MOCS_WB;
- brw->blorp.mocs.rb = CNL_MOCS_PTE;
- brw->blorp.mocs.vb = CNL_MOCS_WB;
brw->blorp.exec = gen10_blorp_exec;
break;
default:
@@ -129,6 +114,20 @@ brw_blorp_init(struct brw_context *brw)
brw->blorp.upload_shader = brw_blorp_upload_shader;
}
+static uint32_t tex_mocs[] = {
+ [7] = GEN7_MOCS_L3,
+ [8] = BDW_MOCS_WB,
+ [9] = SKL_MOCS_WB,
+ [10] = CNL_MOCS_WB,
+};
+
+static uint32_t rb_mocs[] = {
+ [7] = GEN7_MOCS_L3,
+ [8] = BDW_MOCS_PTE,
+ [9] = SKL_MOCS_PTE,
+ [10] = CNL_MOCS_PTE,
+};
+
static void
blorp_surf_for_miptree(struct brw_context *brw,
struct blorp_surf *surf,
@@ -159,6 +158,7 @@ blorp_surf_for_miptree(struct brw_context *brw,
.buffer = mt->bo,
.offset = mt->offset,
.reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0,
+ .mocs = is_render_target ? rb_mocs[devinfo->gen] : tex_mocs[devinfo->gen],
};
surf->aux_usage = aux_usage;
@@ -186,6 +186,7 @@ blorp_surf_for_miptree(struct brw_context *brw,
surf->aux_surf = aux_surf;
surf->aux_addr = (struct blorp_address) {
.reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0,
+ .mocs = surf->addr.mocs,
};
if (mt->mcs_buf) {
diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
index 3c7a7b47dbd..3bf6fd61567 100644
--- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
+++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
@@ -152,6 +152,16 @@ blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size,
*addr = (struct blorp_address) {
.buffer = brw->batch.state_bo,
.offset = offset,
+
+#if GEN_GEN == 10
+ .mocs = CNL_MOCS_WB,
+#elif GEN_GEN == 9
+ .mocs = SKL_MOCS_WB,
+#elif GEN_GEN == 8
+ .mocs = BDW_MOCS_WB,
+#elif GEN_GEN == 7
+ .mocs = GEN7_MOCS_L3,
+#endif
};
return data;