diff options
author | Marek Olšák <[email protected]> | 2018-04-30 22:29:14 -0400 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2018-05-10 18:34:31 -0400 |
commit | 912b0163dc5d6929d8a9ae4c6d475807e764832a (patch) | |
tree | 115fb6be4b3eaa68306e94a442d4bcc6baeb3f17 | |
parent | ee31762ef56a5af6caf9c056e2b7d88ae6d7664d (diff) |
ac/surface: add EQAA support
Reviewed-by: Nicolai Hähnle <[email protected]>
-rw-r--r-- | src/amd/common/ac_surface.c | 29 | ||||
-rw-r--r-- | src/amd/common/ac_surface.h | 3 | ||||
-rw-r--r-- | src/amd/vulkan/radv_image.c | 1 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600_texture.c | 8 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/radeon_winsys.h | 1 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_texture.c | 4 | ||||
-rw-r--r-- | src/gallium/winsys/amdgpu/drm/amdgpu_surface.c | 2 | ||||
-rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_surface.c | 6 |
8 files changed, 43 insertions, 11 deletions
diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 22608c84351..12240c93d6b 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -249,10 +249,27 @@ static int surf_config_sanity(const struct ac_surf_config *config, case 4: case 8: break; + case 16: + if (flags & RADEON_SURF_Z_OR_SBUFFER) + return -EINVAL; + break; default: return -EINVAL; } + if (!(flags & RADEON_SURF_Z_OR_SBUFFER)) { + switch (config->info.color_samples) { + case 0: + case 1: + case 2: + case 4: + case 8: + break; + default: + return -EINVAL; + } + } + if (config->is_3d && config->info.array_size > 1) return -EINVAL; if (config->is_cube && config->info.depth > 1) @@ -607,9 +624,14 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib, } AddrDccIn.numSamples = AddrSurfInfoIn.numSamples = - config->info.samples ? config->info.samples : 1; + MAX2(1, config->info.samples); AddrSurfInfoIn.tileIndex = -1; + if (!(surf->flags & RADEON_SURF_Z_OR_SBUFFER)) { + AddrDccIn.numSamples = AddrSurfInfoIn.numFrags = + MAX2(1, config->info.color_samples); + } + /* Set the micro tile type. */ if (surf->flags & RADEON_SURF_SCANOUT) AddrSurfInfoIn.tileType = ADDR_DISPLAYABLE; @@ -1317,9 +1339,12 @@ static int gfx9_compute_surface(ADDR_HANDLE addrlib, AddrSurfInfoIn.flags.opt4space = 1; AddrSurfInfoIn.numMipLevels = config->info.levels; - AddrSurfInfoIn.numSamples = config->info.samples ? config->info.samples : 1; + AddrSurfInfoIn.numSamples = MAX2(1, config->info.samples); AddrSurfInfoIn.numFrags = AddrSurfInfoIn.numSamples; + if (!(surf->flags & RADEON_SURF_Z_OR_SBUFFER)) + AddrSurfInfoIn.numFrags = MAX2(1, config->info.color_samples); + /* GFX9 doesn't support 1D depth textures, so allocate all 1D textures * as 2D to avoid having shader variants for 1D vs 2D, so all shaders * must sample 1D textures as 2D. */ diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h index 45fb8045e53..864b5bad529 100644 --- a/src/amd/common/ac_surface.h +++ b/src/amd/common/ac_surface.h @@ -224,7 +224,8 @@ struct ac_surf_info { uint32_t width; uint32_t height; uint32_t depth; - uint8_t samples; + uint8_t samples; /* For Z/S: samples; For color: FMASK coverage samples */ + uint8_t color_samples; /* For color: color samples */ uint8_t levels; uint8_t num_channels; /* heuristic for displayability */ uint16_t array_size; diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 5b13cf952b7..076b9ebf27a 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -937,6 +937,7 @@ radv_image_create(VkDevice _device, image->info.height = pCreateInfo->extent.height; image->info.depth = pCreateInfo->extent.depth; image->info.samples = pCreateInfo->samples; + image->info.color_samples = pCreateInfo->samples; image->info.array_size = pCreateInfo->arrayLayers; image->info.levels = pCreateInfo->mipLevels; image->info.num_channels = vk_format_get_nr_components(pCreateInfo->format); diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c index c39c00c2e3e..f86a12c4688 100644 --- a/src/gallium/drivers/r600/r600_texture.c +++ b/src/gallium/drivers/r600/r600_texture.c @@ -245,8 +245,8 @@ static int r600_init_surface(struct r600_common_screen *rscreen, if (!(ptex->flags & R600_RESOURCE_FLAG_FORCE_TILING)) flags |= RADEON_SURF_OPTIMIZE_FOR_SPACE; - r = rscreen->ws->surface_init(rscreen->ws, ptex, flags, bpe, - array_mode, surface); + r = rscreen->ws->surface_init(rscreen->ws, ptex, ptex->nr_samples, + flags, bpe, array_mode, surface); if (r) { return r; } @@ -616,8 +616,8 @@ void r600_texture_get_fmask_info(struct r600_common_screen *rscreen, bpe *= 2; } - if (rscreen->ws->surface_init(rscreen->ws, &templ, flags, bpe, - RADEON_SURF_MODE_2D, &fmask)) { + if (rscreen->ws->surface_init(rscreen->ws, &templ, templ.nr_samples, + flags, bpe, RADEON_SURF_MODE_2D, &fmask)) { R600_ERR("Got error in surface_init while allocating FMASK.\n"); return; } diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index fae4fb7a95d..abf70ce762b 100644 --- a/src/gallium/drivers/radeon/radeon_winsys.h +++ b/src/gallium/drivers/radeon/radeon_winsys.h @@ -649,6 +649,7 @@ struct radeon_winsys { */ int (*surface_init)(struct radeon_winsys *ws, const struct pipe_resource *tex, + unsigned num_color_samples, unsigned flags, unsigned bpe, enum radeon_surf_mode mode, struct radeon_surf *surf); diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 81a70153f32..1e328b90b62 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -301,8 +301,8 @@ static int si_init_surface(struct si_screen *sscreen, if (!(ptex->flags & SI_RESOURCE_FLAG_FORCE_TILING)) flags |= RADEON_SURF_OPTIMIZE_FOR_SPACE; - r = sscreen->ws->surface_init(sscreen->ws, ptex, flags, bpe, - array_mode, surface); + r = sscreen->ws->surface_init(sscreen->ws, ptex, ptex->nr_samples, + flags, bpe, array_mode, surface); if (r) { return r; } diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c index b5a1ebb1628..d5fa37bb6d9 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c @@ -62,6 +62,7 @@ static int amdgpu_surface_sanity(const struct pipe_resource *tex) static int amdgpu_surface_init(struct radeon_winsys *rws, const struct pipe_resource *tex, + unsigned num_color_samples, unsigned flags, unsigned bpe, enum radeon_surf_mode mode, struct radeon_surf *surf) @@ -85,6 +86,7 @@ static int amdgpu_surface_init(struct radeon_winsys *rws, config.info.depth = tex->depth0; config.info.array_size = tex->array_size; config.info.samples = tex->nr_samples; + config.info.color_samples = num_color_samples; config.info.levels = tex->last_level + 1; config.info.num_channels = util_format_get_nr_components(tex->format); config.is_3d = !!(tex->target == PIPE_TEXTURE_3D); diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_surface.c b/src/gallium/winsys/radeon/drm/radeon_drm_surface.c index 61220ed7fe3..4677a3bea7c 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_surface.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_surface.c @@ -222,6 +222,7 @@ static void surf_drm_to_winsys(struct radeon_drm_winsys *ws, static int radeon_winsys_surface_init(struct radeon_winsys *rws, const struct pipe_resource *tex, + unsigned num_color_samples, unsigned flags, unsigned bpe, enum radeon_surf_mode mode, struct radeon_surf *surf_ws) @@ -269,8 +270,9 @@ static int radeon_winsys_surface_init(struct radeon_winsys *rws, return -1; } - if (radeon_winsys_surface_init(rws, &templ, fmask_flags, bpe, - RADEON_SURF_MODE_2D, &fmask)) { + if (radeon_winsys_surface_init(rws, &templ, num_color_samples, + fmask_flags, bpe, RADEON_SURF_MODE_2D, + &fmask)) { fprintf(stderr, "Got error in surface_init while allocating FMASK.\n"); return -1; } |