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authorEric Anholt <[email protected]>2011-08-05 19:31:53 -0700
committerEric Anholt <[email protected]>2011-08-16 13:04:42 -0700
commit814a9bef30beda427e8fbf6f3b8abb6a45f0e2e4 (patch)
treeadf708edd95924323515a02aa7fe51e165c1cc61
parente5363c7fd2ed6318e86ba4a62adc0c2377e51eef (diff)
i965/vs: Drop the assertion about dst.reg_offset == 0.
Adding the offset is the right thing to do here, and fixes glsl-vs-mat-add-1.
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_emit.cpp1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
index be089369bcf..a41c58c7d52 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
@@ -146,7 +146,6 @@ vec4_instruction::get_dst(void)
switch (dst.file) {
case GRF:
- assert(dst.reg_offset == 0);
brw_reg = brw_vec8_grf(dst.reg + dst.reg_offset, 0);
brw_reg = retype(brw_reg, dst.type);
brw_reg.dw1.bits.writemask = dst.writemask;