summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorNicolai Hähnle <[email protected]>2018-08-31 19:59:48 +0200
committerMarek Olšák <[email protected]>2019-07-03 15:51:13 -0400
commit6bcc273de8a535a70a0178ec4ada9e06ca518c04 (patch)
tree682f485cef5818e68afba19f25e920fb7ac62e6b
parent2492cfde668bf06f2fb2dc2dce9044a250208883 (diff)
radeonsi/gfx10: implement si_init_tess_factor_ring
Acked-by: Bas Nieuwenhuizen <[email protected]>
-rw-r--r--src/gallium/drivers/radeonsi/si_state_shaders.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 77abdaf4337..7450fa67ffc 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -3630,7 +3630,10 @@ static void si_init_tess_factor_ring(struct si_context *sctx)
S_030938_SIZE(sctx->screen->tess_factor_ring_size / 4));
si_pm4_set_reg(sctx->init_config, R_030940_VGT_TF_MEMORY_BASE,
factor_va >> 8);
- if (sctx->chip_class >= GFX9)
+ if (sctx->chip_class >= GFX10)
+ si_pm4_set_reg(sctx->init_config, R_030984_VGT_TF_MEMORY_BASE_HI_UMD,
+ S_030984_BASE_HI(factor_va >> 40));
+ else if (sctx->chip_class == GFX9)
si_pm4_set_reg(sctx->init_config, R_030944_VGT_TF_MEMORY_BASE_HI,
S_030944_BASE_HI(factor_va >> 40));
si_pm4_set_reg(sctx->init_config, R_03093C_VGT_HS_OFFCHIP_PARAM,