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authorKenneth Graunke <[email protected]>2018-04-10 01:27:56 -0700
committerKenneth Graunke <[email protected]>2018-06-06 19:45:09 -0700
commit3ea2d791f3e72859a755e6e50a5330fc41a4bd2f (patch)
tree9046ef0a0d6d6d8205f99230e147bbdf9214bd70
parenta363bb2cd0e2a141f2c60be005009703bffcbe4e (diff)
i965: Require softpin support for Cannonlake and later.
This isn't strictly necessary, but anyone running Cannonlake will already have Kernel 4.5 or later, so there's no reason to support the relocation model on Gen10+. This will let us avoid dealing with them for new features. Reviewed-by: Scott D Phillips <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_bufmgr.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c b/src/mesa/drivers/dri/i965/brw_bufmgr.c
index b5e3eb6bff9..7ac3bcad3da 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
@@ -1732,6 +1732,16 @@ brw_bufmgr_init(struct gen_device_info *devinfo, int fd)
4096, _4GB);
util_vma_heap_init(&bufmgr->vma_allocator[BRW_MEMZONE_OTHER],
1 * _4GB, gtt_size - 1 * _4GB);
+ } else if (devinfo->gen >= 10) {
+ /* Softpin landed in 4.5, but GVT used an aliasing PPGTT until
+ * kernel commit 6b3816d69628becb7ff35978aa0751798b4a940a in
+ * 4.14. Gen10+ GVT hasn't landed yet, so it's not actually a
+ * problem - but extending this requirement back to earlier gens
+ * might actually mean requiring 4.14.
+ */
+ fprintf(stderr, "i965 requires softpin (Kernel 4.5) on Gen10+.");
+ free(bufmgr);
+ return NULL;
}
}