diff options
author | Rob Clark <[email protected]> | 2019-09-19 11:30:01 -0700 |
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committer | Rob Clark <[email protected]> | 2019-09-23 20:02:34 +0000 |
commit | 331f89a97176b4b559c7020d69b148b85473f16b (patch) | |
tree | 8cd4686252aee2fd38e66847e74049b6e85275ed | |
parent | 05d32850ffcdd036d5ec340bf75c133e120d5edc (diff) |
freedreno/a6xx: un-open-code PC_PRIMITIVE_CNTL_1.PSIZE
Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Reviewed-by: Kristian H. Kristensen <[email protected]>
-rw-r--r-- | src/gallium/drivers/freedreno/a6xx/fd6_program.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.c b/src/gallium/drivers/freedreno/a6xx/fd6_program.c index 3a1c0a411f9..08c264b4f11 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_program.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.c @@ -399,7 +399,7 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_screen *screen, OUT_PKT4(ring, REG_A6XX_PC_PRIMITIVE_CNTL_1, 1); OUT_RING(ring, A6XX_PC_PRIMITIVE_CNTL_1_STRIDE_IN_VPC(l.max_loc) | - CONDREG(psize_regid, 0x100)); + CONDREG(psize_regid, A6XX_PC_PRIMITIVE_CNTL_1_PSIZE)); if (binning_pass) { OUT_PKT4(ring, REG_A6XX_SP_FS_OBJ_START_LO, 2); |