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authorDave Airlie <[email protected]>2017-07-06 03:06:01 +0100
committerDave Airlie <[email protected]>2017-07-06 23:07:49 +0100
commit09d7c7be4f1750a24670f8e7f9c555d88e47708f (patch)
tree24979b664378be519fcf42407a9b0d87cc5bddf4
parentd97275e42c0750fa74ce17de4f985c73c54a1bf4 (diff)
radv: enable sisched toggle in perftest flags.
RADV_PERFTEST=sisched to enable it. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
-rw-r--r--src/amd/common/ac_llvm_util.c5
-rw-r--r--src/amd/common/ac_llvm_util.h1
-rw-r--r--src/amd/vulkan/radv_debug.h1
-rw-r--r--src/amd/vulkan/radv_device.c1
-rw-r--r--src/amd/vulkan/radv_pipeline.c4
5 files changed, 10 insertions, 2 deletions
diff --git a/src/amd/common/ac_llvm_util.c b/src/amd/common/ac_llvm_util.c
index 84ed73f164e..d14057fa768 100644
--- a/src/amd/common/ac_llvm_util.c
+++ b/src/amd/common/ac_llvm_util.c
@@ -126,8 +126,9 @@ LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family, enum ac
LLVMTargetRef target = ac_get_llvm_target(triple);
snprintf(features, sizeof(features),
- "+DumpCode,+vgpr-spilling,-fp32-denormals%s",
- family >= CHIP_VEGA10 ? ",+xnack" : ",-xnack");
+ "+DumpCode,+vgpr-spilling,-fp32-denormals%s%s",
+ family >= CHIP_VEGA10 ? ",+xnack" : ",-xnack",
+ tm_options & AC_TM_SISCHED ? ",+si-scheduler" : "");
LLVMTargetMachineRef tm = LLVMCreateTargetMachine(
target,
diff --git a/src/amd/common/ac_llvm_util.h b/src/amd/common/ac_llvm_util.h
index 06208a41ce8..21f3e837747 100644
--- a/src/amd/common/ac_llvm_util.h
+++ b/src/amd/common/ac_llvm_util.h
@@ -56,6 +56,7 @@ enum ac_func_attr {
enum ac_target_machine_options {
AC_TM_SUPPORTS_SPILL = (1 << 0),
+ AC_TM_SISCHED = (1 << 1),
};
LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family, enum ac_target_machine_options tm_options);
diff --git a/src/amd/vulkan/radv_debug.h b/src/amd/vulkan/radv_debug.h
index c986c7bc9d7..c345d040c5d 100644
--- a/src/amd/vulkan/radv_debug.h
+++ b/src/amd/vulkan/radv_debug.h
@@ -39,5 +39,6 @@ enum {
enum {
RADV_PERFTEST_BATCHCHAIN = 0x1,
+ RADV_PERFTEST_SISCHED = 0x2,
};
#endif
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 8cf54427634..d1c519a1b7a 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -370,6 +370,7 @@ static const struct debug_control radv_debug_options[] = {
static const struct debug_control radv_perftest_options[] = {
{"batchchain", RADV_PERFTEST_BATCHCHAIN},
+ {"sisched", RADV_PERFTEST_SISCHED},
{NULL, 0}
};
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 71a5cce4e9c..90cd716047a 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -467,6 +467,8 @@ static struct radv_shader_variant *radv_shader_variant_create(struct radv_device
options.supports_spill = device->llvm_supports_spill;
if (options.supports_spill)
tm_options |= AC_TM_SUPPORTS_SPILL;
+ if (device->instance->perftest_flags & RADV_PERFTEST_SISCHED)
+ tm_options |= AC_TM_SISCHED;
tm = ac_create_target_machine(chip_family, tm_options);
ac_compile_nir_shader(tm, &binary, &variant->config,
&variant->info, shader, &options, dump);
@@ -508,6 +510,8 @@ radv_pipeline_create_gs_copy_shader(struct radv_pipeline *pipeline,
options.chip_class = pipeline->device->physical_device->rad_info.chip_class;
if (options.supports_spill)
tm_options |= AC_TM_SUPPORTS_SPILL;
+ if (pipeline->device->instance->perftest_flags & RADV_PERFTEST_SISCHED)
+ tm_options |= AC_TM_SISCHED;
tm = ac_create_target_machine(chip_family, tm_options);
ac_create_gs_copy_shader(tm, nir, &binary, &variant->config, &variant->info, &options, dump_shader);
LLVMDisposeTargetMachine(tm);