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authorTimothy Arceri <[email protected]>2018-01-11 12:47:31 +1100
committerTimothy Arceri <[email protected]>2018-01-17 17:14:14 +1100
commitf69cbb2b53ac3edf7b201ba77430a61471edfa6e (patch)
tree720f465f1b46a2ab047441e098084cbf6a387d27
parentaf10ce21fffdbe5222115950878878175823bb27 (diff)
st/glsl_to_nir: disable io lowering to temps for tess
Lowering these to temps makes a big mess, and results in some piglit test failures. Also the radeonsi backend (the only backend to support tess) has support for indirects so there is no need to lower them anyway. Fixes the following piglit tests on radeonsi: tests/spec/arb_tessellation_shader/execution/variable-indexing/tes-input-array-vec3-index-rd.shader_test tests/spec/arb_tessellation_shader/execution/variable-indexing/tes-input-array-vec4-index-rd.shader_test Reviewed-by: Marek Olšák <[email protected]>
-rw-r--r--src/mesa/state_tracker/st_glsl_to_nir.cpp12
1 files changed, 8 insertions, 4 deletions
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index 1c5de3d5def..bd6d588a989 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -490,9 +490,12 @@ st_nir_get_mesa_program(struct gl_context *ctx,
set_st_program(prog, shader_program, nir);
prog->nir = nir;
- NIR_PASS_V(nir, nir_lower_io_to_temporaries,
- nir_shader_get_entrypoint(nir),
- true, true);
+ if (nir->info.stage != MESA_SHADER_TESS_CTRL &&
+ nir->info.stage != MESA_SHADER_TESS_EVAL) {
+ NIR_PASS_V(nir, nir_lower_io_to_temporaries,
+ nir_shader_get_entrypoint(nir),
+ true, true);
+ }
NIR_PASS_V(nir, nir_lower_global_vars_to_local);
NIR_PASS_V(nir, nir_split_var_copies);
NIR_PASS_V(nir, nir_lower_var_copies);
@@ -665,7 +668,8 @@ st_finalize_nir(struct st_context *st, struct gl_program *prog,
NIR_PASS_V(nir, nir_split_var_copies);
NIR_PASS_V(nir, nir_lower_var_copies);
- if (nir->info.stage != MESA_SHADER_TESS_CTRL)
+ if (nir->info.stage != MESA_SHADER_TESS_CTRL &&
+ nir->info.stage != MESA_SHADER_TESS_EVAL)
NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects);
if (nir->info.stage == MESA_SHADER_VERTEX) {