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authorTopi Pohjolainen <[email protected]>2015-03-27 16:25:56 +0200
committerTopi Pohjolainen <[email protected]>2015-04-30 00:28:49 +0300
commitdfd896699d9f640518c0fbafb0352f454d5fc466 (patch)
treea40febb9b07b79d77b50b8305c03c9c60093a32d
parent91daf9f09bac41c84c6868a56e0d538cc59cc334 (diff)
i965/blorp: Add support for layered rendering
Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.cpp6
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.h4
-rw-r--r--src/mesa/drivers/dri/i965/gen6_blorp.cpp2
-rw-r--r--src/mesa/drivers/dri/i965/gen7_blorp.cpp2
4 files changed, 9 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 8f82851a624..b404869f0c7 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -156,7 +156,8 @@ brw_blorp_surface_info::compute_tile_offsets(uint32_t *tile_x,
brw_blorp_params::brw_blorp_params(unsigned num_varyings,
- unsigned num_draw_buffers)
+ unsigned num_draw_buffers,
+ unsigned num_layers)
: x0(0),
y0(0),
x1(0),
@@ -165,7 +166,8 @@ brw_blorp_params::brw_blorp_params(unsigned num_varyings,
hiz_op(GEN6_HIZ_OP_NONE),
use_wm_prog(false),
num_varyings(num_varyings),
- num_draw_buffers(num_draw_buffers)
+ num_draw_buffers(num_draw_buffers),
+ num_layers(num_layers)
{
}
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index c9957a6a8e5..dd28d810f7f 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -212,7 +212,8 @@ class brw_blorp_params
{
public:
brw_blorp_params(unsigned num_varyings = 0,
- unsigned num_draw_buffers = 1);
+ unsigned num_draw_buffers = 1,
+ unsigned num_layers = 1);
virtual uint32_t get_wm_prog(struct brw_context *brw,
brw_blorp_prog_data **prog_data) const = 0;
@@ -230,6 +231,7 @@ public:
brw_blorp_wm_push_constants wm_push_consts;
const unsigned num_varyings;
const unsigned num_draw_buffers;
+ const unsigned num_layers;
};
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index bfd20016d63..ed08898d957 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -992,7 +992,7 @@ gen6_blorp_emit_primitive(struct brw_context *brw,
GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL);
OUT_BATCH(3); /* vertex count per instance */
OUT_BATCH(0);
- OUT_BATCH(1); /* instance count */
+ OUT_BATCH(params->num_layers); /* instance count */
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index 3065a4c2f46..2bdc82bc895 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -753,7 +753,7 @@ gen7_blorp_emit_primitive(struct brw_context *brw,
_3DPRIM_RECTLIST);
OUT_BATCH(3); /* vertex count per instance */
OUT_BATCH(0);
- OUT_BATCH(1); /* instance count */
+ OUT_BATCH(params->num_layers); /* instance count */
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();