diff options
| author | Dave Airlie <[email protected]> | 2018-02-28 09:53:51 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2018-02-28 09:58:12 +1000 |
| commit | c7b25005a135199a84d3eec7cc96b6a789ece0b3 (patch) | |
| tree | 2a09b7ea8b288b045fdfee428194d4caab1a443d | |
| parent | 3401b028df1074a06a7fbc3fb1cda949646ef75d (diff) | |
ac/radv: move load base vertex abi setup to vertex shader.
This was segfaulting:
dEQP-VK.memory.pipeline_barrier.host_write_index_buffer.1024
Fixes: 8de6f797070 (ac/radeonsi: add load_base_vertex() to the abi)
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 44d96d27d7f..8b662f884f8 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -6920,7 +6920,6 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm, ctx.gs_max_out_vertices = shaders[i]->info.gs.vertices_out; ctx.abi.load_inputs = load_gs_input; ctx.abi.emit_primitive = visit_end_primitive; - ctx.abi.load_base_vertex = radv_load_base_vertex; } else if (shaders[i]->info.stage == MESA_SHADER_TESS_CTRL) { ctx.tcs_outputs_read = shaders[i]->info.outputs_read; ctx.tcs_patch_outputs_read = shaders[i]->info.patch_outputs_read; @@ -6944,6 +6943,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm, MAX2(1, ctx.shader_info->vs.vgpr_comp_cnt); } } + ctx.abi.load_base_vertex = radv_load_base_vertex; } else if (shaders[i]->info.stage == MESA_SHADER_FRAGMENT) { shader_info->fs.can_discard = shaders[i]->info.fs.uses_discard; ctx.abi.lookup_interp_param = lookup_interp_param; |