diff options
author | Matt Turner <[email protected]> | 2017-06-15 15:41:40 -0700 |
---|---|---|
committer | Matt Turner <[email protected]> | 2018-02-28 11:15:47 -0800 |
commit | bed0267ff64d923feff01ab9144a8f8283700d63 (patch) | |
tree | 4747914f68a25958c699b4824c4972f0ef456569 | |
parent | 3a584a15c0b1dd6c31a6520a0f749306f48d5782 (diff) |
intel/compiler/fs: Pass fs_inst to generate_ddx/ddy instead of opcode
In a future patch, generate_ddy will want to inspect inst->exec_size.
Change generate_ddx as well for consistency.
Reviewed-by: Kenneth Graunke <[email protected]>
-rw-r--r-- | src/intel/compiler/brw_fs.h | 6 | ||||
-rw-r--r-- | src/intel/compiler/brw_fs_generator.cpp | 12 |
2 files changed, 10 insertions, 8 deletions
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index 37106ccb284..76ad76e08b7 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -417,8 +417,10 @@ private: void generate_get_buffer_size(fs_inst *inst, struct brw_reg dst, struct brw_reg src, struct brw_reg surf_index); - void generate_ddx(enum opcode op, struct brw_reg dst, struct brw_reg src); - void generate_ddy(enum opcode op, struct brw_reg dst, struct brw_reg src); + void generate_ddx(const fs_inst *inst, + struct brw_reg dst, struct brw_reg src); + void generate_ddy(const fs_inst *inst, + struct brw_reg dst, struct brw_reg src); void generate_scratch_write(fs_inst *inst, struct brw_reg src); void generate_scratch_read(fs_inst *inst, struct brw_reg dst); void generate_scratch_read_gen7(fs_inst *inst, struct brw_reg dst); diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 736b3b5fba0..c49af89f2f8 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -1148,12 +1148,12 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src * appropriate swizzling. */ void -fs_generator::generate_ddx(enum opcode opcode, +fs_generator::generate_ddx(const fs_inst *inst, struct brw_reg dst, struct brw_reg src) { unsigned vstride, width; - if (opcode == FS_OPCODE_DDX_FINE) { + if (inst->opcode == FS_OPCODE_DDX_FINE) { /* produce accurate derivatives */ vstride = BRW_VERTICAL_STRIDE_2; width = BRW_WIDTH_2; @@ -1185,10 +1185,10 @@ fs_generator::generate_ddx(enum opcode opcode, * left. */ void -fs_generator::generate_ddy(enum opcode opcode, +fs_generator::generate_ddy(const fs_inst *inst, struct brw_reg dst, struct brw_reg src) { - if (opcode == FS_OPCODE_DDY_FINE) { + if (inst->opcode == FS_OPCODE_DDY_FINE) { /* produce accurate derivatives */ struct brw_reg src0 = brw_reg(src.file, src.nr, 0, src.negate, src.abs, @@ -2044,11 +2044,11 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width) break; case FS_OPCODE_DDX_COARSE: case FS_OPCODE_DDX_FINE: - generate_ddx(inst->opcode, dst, src[0]); + generate_ddx(inst, dst, src[0]); break; case FS_OPCODE_DDY_COARSE: case FS_OPCODE_DDY_FINE: - generate_ddy(inst->opcode, dst, src[0]); + generate_ddy(inst, dst, src[0]); break; case SHADER_OPCODE_GEN4_SCRATCH_WRITE: |