diff options
| author | Iago Toral Quiroga <[email protected]> | 2018-12-18 09:27:21 +0100 |
|---|---|---|
| committer | Juan A. Suarez Romero <[email protected]> | 2019-04-18 11:05:18 +0200 |
| commit | b6a454791b45b60b9518b4b8fb41fd443b3ceab1 (patch) | |
| tree | 40196805f1c7f2639239a10dddfb7b948ccefeb1 | |
| parent | 66806405afa02024813869d8cc972f293041fa50 (diff) | |
intel/compiler: assert restrictions on conversions to half-float
There are some hardware restrictions that brw_nir_lower_conversions should
have taken care of before we get here.
v2:
- rebased on top of regioning lowering pass
Reviewed-by: Topi Pohjolainen <[email protected]> (v1)
Reviewed-by: Jason Ekstrand <[email protected]>
| -rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 2aaa473e698..e04667c5099 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -888,6 +888,9 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr) */ case nir_op_f2f16: + case nir_op_i2f16: + case nir_op_u2f16: + assert(type_sz(op[0].type) < 8); /* brw_nir_lower_conversions */ inst = bld.MOV(result, op[0]); inst->saturate = instr->dest.saturate; break; @@ -927,8 +930,6 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr) case nir_op_u2u32: case nir_op_i2i16: case nir_op_u2u16: - case nir_op_i2f16: - case nir_op_u2f16: case nir_op_i2i8: case nir_op_u2u8: inst = bld.MOV(result, op[0]); |