diff options
author | Ben Skeggs <[email protected]> | 2008-07-11 00:21:42 +1000 |
---|---|---|
committer | Ben Skeggs <[email protected]> | 2008-07-11 00:21:42 +1000 |
commit | add89c78455f04654c3706d46e3d3e6b92b73b71 (patch) | |
tree | 6ba25a9bc401d9b53c718f63701455be53d048df | |
parent | 861629d1fd4a1d256c913470c33d9522e83d615d (diff) |
nouveau: update to latest object header
-rw-r--r-- | src/gallium/drivers/nouveau/nouveau_class.h | 52 | ||||
-rw-r--r-- | src/gallium/drivers/nv50/nv50_screen.c | 12 |
2 files changed, 44 insertions, 20 deletions
diff --git a/src/gallium/drivers/nouveau/nouveau_class.h b/src/gallium/drivers/nouveau/nouveau_class.h index 4ec5062709e..18d8d3677db 100644 --- a/src/gallium/drivers/nouveau/nouveau_class.h +++ b/src/gallium/drivers/nouveau/nouveau_class.h @@ -1798,6 +1798,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5 0x00000100 #define NV10TCL_TX_FORMAT_FORMAT_A8_RECT 0x00000180 #define NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4 0x00000200 +#define NV10TCL_TX_FORMAT_FORMAT_R5G6B5 0x00000280 #define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8 0x00000300 #define NV10TCL_TX_FORMAT_FORMAT_X8R8G8B8 0x00000380 #define NV10TCL_TX_FORMAT_FORMAT_INDEX8 0x00000580 @@ -1805,15 +1806,22 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV10TCL_TX_FORMAT_FORMAT_DXT3 0x00000700 #define NV10TCL_TX_FORMAT_FORMAT_DXT5 0x00000780 #define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT 0x00000800 +#define NV10TCL_TX_FORMAT_FORMAT_R5G6B5_RECT 0x00000880 #define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT 0x00000900 #define NV10TCL_TX_FORMAT_FORMAT_L8_RECT 0x00000980 #define NV10TCL_TX_FORMAT_FORMAT_A8L8 0x00000d00 #define NV10TCL_TX_FORMAT_FORMAT_A8_RECT2 0x00000d80 -#define NV10TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00000f00 #define NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT 0x00000e80 +#define NV10TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00000f00 #define NV10TCL_TX_FORMAT_FORMAT_L8A8_RECT 0x00001000 #define NV10TCL_TX_FORMAT_FORMAT_A16 0x00001900 +#define NV10TCL_TX_FORMAT_FORMAT_HILO16 0x00001980 #define NV10TCL_TX_FORMAT_FORMAT_A16_RECT 0x00001a80 +#define NV10TCL_TX_FORMAT_FORMAT_HILO16_RECT 0x00001b00 +#define NV10TCL_TX_FORMAT_FORMAT_HILO8 0x00002200 +#define NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8 0x00002280 +#define NV10TCL_TX_FORMAT_FORMAT_HILO8_RECT 0x00002300 +#define NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT 0x00002380 #define NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV 0x00002500 #define NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV 0x00002580 #define NV10TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV 0x00002600 @@ -5486,18 +5494,23 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV50TCL_NOP 0x00000100 #define NV50TCL_NOTIFY 0x00000104 #define NV50TCL_DMA_NOTIFY 0x00000180 -#define NV50TCL_DMA_IN_MEMORY0(x) (0x00000184+((x)*4)) -#define NV50TCL_DMA_IN_MEMORY0__SIZE 0x0000000b -#define NV50TCL_DMA_IN_MEMORY1(x) (0x000001c0+((x)*4)) -#define NV50TCL_DMA_IN_MEMORY1__SIZE 0x00000008 +#define NV50TCL_DMA_UNK0(x) (0x00000184+((x)*4)) +#define NV50TCL_DMA_UNK0__SIZE 0x0000000b +#define NV50TCL_DMA_UNK1(x) (0x000001c0+((x)*4)) +#define NV50TCL_DMA_UNK1__SIZE 0x00000008 #define NV50TCL_RT_ADDRESS_HIGH(x) (0x00000200+((x)*32)) #define NV50TCL_RT_ADDRESS_HIGH__SIZE 0x00000008 #define NV50TCL_RT_ADDRESS_LOW(x) (0x00000204+((x)*32)) #define NV50TCL_RT_ADDRESS_LOW__SIZE 0x00000008 #define NV50TCL_RT_FORMAT(x) (0x00000208+((x)*32)) #define NV50TCL_RT_FORMAT__SIZE 0x00000008 -#define NV50TCL_RT_UNK3(x) (0x0000020c+((x)*32)) -#define NV50TCL_RT_UNK3__SIZE 0x00000008 +#define NV50TCL_RT_FORMAT_32BPP 0x000000cf +#define NV50TCL_RT_FORMAT_24BPP 0x000000e6 +#define NV50TCL_RT_FORMAT_16BPP 0x000000e8 +#define NV50TCL_RT_FORMAT_8BPP 0x000000f3 +#define NV50TCL_RT_FORMAT_15BPP 0x000000f8 +#define NV50TCL_RT_TILE_UNK(x) (0x0000020c+((x)*32)) +#define NV50TCL_RT_TILE_UNK__SIZE 0x00000008 #define NV50TCL_RT_UNK4(x) (0x00000210+((x)*32)) #define NV50TCL_RT_UNK4__SIZE 0x00000008 #define NV50TCL_VTX_ATTR_1F(x) (0x00000300+((x)*4)) @@ -5602,9 +5615,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV50TCL_SCISSOR_VERT_T_MASK 0x0000ffff #define NV50TCL_SCISSOR_VERT_B_SHIFT 16 #define NV50TCL_SCISSOR_VERT_B_MASK 0xffff0000 -#define NV50TCL_VP_UPLOAD_CONST_ID 0x00000f00 -#define NV50TCL_VP_UPLOAD_CONST(x) (0x00000f04+((x)*4)) -#define NV50TCL_VP_UPLOAD_CONST__SIZE 0x00000010 +#define NV50TCL_CB_ADDR 0x00000f00 +#define NV50TCL_CB_ADDR_ID_SHIFT 8 +#define NV50TCL_CB_ADDR_ID_MASK 0xffffff00 +#define NV50TCL_CB_ADDR_BUFFER_SHIFT 0 +#define NV50TCL_CB_ADDR_BUFFER_MASK 0x000000ff +#define NV50TCL_CB_DATA(x) (0x00000f04+((x)*4)) +#define NV50TCL_CB_DATA__SIZE 0x00000010 #define NV50TCL_STENCIL_FRONT_FUNC_REF 0x00000f54 #define NV50TCL_STENCIL_FRONT_MASK 0x00000f58 #define NV50TCL_STENCIL_FRONT_FUNC_MASK 0x00000f5c @@ -5626,6 +5643,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV50TCL_RT_HORIZ__SIZE 0x00000008 #define NV50TCL_RT_VERT(x) (0x00001244+((x)*8)) #define NV50TCL_RT_VERT__SIZE 0x00000008 +#define NV50TCL_CB_DEF_ADDRESS_HIGH 0x00001280 +#define NV50TCL_CB_DEF_ADDRESS_LOW 0x00001284 +#define NV50TCL_CB_DEF_SET 0x00001288 +#define NV50TCL_CB_DEF_SET_SIZE_SHIFT 0 +#define NV50TCL_CB_DEF_SET_SIZE_MASK 0x0000ffff +#define NV50TCL_CB_DEF_SET_BUFFER_SHIFT 16 +#define NV50TCL_CB_DEF_SET_BUFFER_MASK 0xffff0000 #define NV50TCL_DEPTH_TEST_ENABLE 0x000012cc #define NV50TCL_SHADE_MODEL 0x000012d4 #define NV50TCL_SHADE_MODEL_FLAT 0x00001d00 @@ -5779,12 +5803,12 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV50TCL_GP_START_ID 0x00001410 #define NV50TCL_FP_START_ID 0x00001414 #define NV50TCL_POINT_SIZE 0x00001518 -#define NV50TCL_TEX_CB0_ADDRESS_HIGH 0x0000155c -#define NV50TCL_TEX_CB0_ADDRESS_LOW 0x00001560 +#define NV50TCL_TSC_ADDRESS_HIGH 0x0000155c +#define NV50TCL_TSC_ADDRESS_LOW 0x00001560 #define NV50TCL_POLYGON_OFFSET_FACTOR 0x0000156c #define NV50TCL_LINE_SMOOTH_ENABLE 0x00001570 -#define NV50TCL_TEX_CB1_ADDRESS_HIGH 0x00001574 -#define NV50TCL_TEX_CB1_ADDRESS_LOW 0x00001578 +#define NV50TCL_TIC_ADDRESS_HIGH 0x00001574 +#define NV50TCL_TIC_ADDRESS_LOW 0x00001578 #define NV50TCL_STENCIL_FRONT_ENABLE 0x00001594 #define NV50TCL_STENCIL_FRONT_OP_FAIL 0x00001598 #define NV50TCL_STENCIL_FRONT_OP_FAIL_ZERO 0x00000000 diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c index 5b4c5f96ac3..e4c09a99d8b 100644 --- a/src/gallium/drivers/nv50/nv50_screen.c +++ b/src/gallium/drivers/nv50/nv50_screen.c @@ -189,13 +189,13 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws) so_data (so, 1); so_method(so, screen->tesla, NV50TCL_DMA_NOTIFY, 1); so_data (so, screen->sync->handle); - so_method(so, screen->tesla, NV50TCL_DMA_IN_MEMORY0(0), - NV50TCL_DMA_IN_MEMORY0__SIZE); - for (i = 0; i < NV50TCL_DMA_IN_MEMORY0__SIZE; i++) + so_method(so, screen->tesla, NV50TCL_DMA_UNK0(0), + NV50TCL_DMA_UNK0__SIZE); + for (i = 0; i < NV50TCL_DMA_UNK0__SIZE; i++) so_data(so, nvws->channel->vram->handle); - so_method(so, screen->tesla, NV50TCL_DMA_IN_MEMORY1(0), - NV50TCL_DMA_IN_MEMORY1__SIZE); - for (i = 0; i < NV50TCL_DMA_IN_MEMORY1__SIZE; i++) + so_method(so, screen->tesla, NV50TCL_DMA_UNK1(0), + NV50TCL_DMA_UNK1__SIZE); + for (i = 0; i < NV50TCL_DMA_UNK1__SIZE; i++) so_data(so, nvws->channel->vram->handle); so_method(so, screen->tesla, 0x121c, 1); so_data (so, 1); |