summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorIlia Mirkin <[email protected]>2016-10-18 00:25:38 -0400
committerIlia Mirkin <[email protected]>2016-10-22 12:02:35 -0400
commitadad576bfc606694323fcbda3113ea339a3e935d (patch)
tree7f3c2ac6f03e8cff0f264ff3bcbb5992cc68ee0b
parent3fdeb7c983d5a6e8704024dc841ff217377ba284 (diff)
nv50/ir: use levelZero for non-frag tex/txp ops
radeonsi also does the same thing. I suspect that this is likely to be a no-op in reality, but it brings nouveau code closer to what the blob produces. Plus it makes sense to not try to do auto-derivatives on this. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index 3e4f26c6bb1..b47fc497c87 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -2227,6 +2227,11 @@ Converter::handleTEX(Value *dst[4], int R, int S, int L, int C, int Dx, int Dy)
if (tgsi.getOpcode() == TGSI_OPCODE_SAMPLE_C_LZ)
texi->tex.levelZero = true;
+ if (prog->getType() != Program::TYPE_FRAGMENT &&
+ (tgsi.getOpcode() == TGSI_OPCODE_TEX ||
+ tgsi.getOpcode() == TGSI_OPCODE_TEX2 ||
+ tgsi.getOpcode() == TGSI_OPCODE_TXP))
+ texi->tex.levelZero = true;
if (tgsi.getOpcode() == TGSI_OPCODE_TG4 && !tgt.isShadow())
texi->tex.gatherComp = tgsi.getSrc(1).getValueU32(0, info);