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authorNicolai Haehnle <[email protected]>2009-02-14 17:06:06 +0100
committerNicolai Haehnle <[email protected]>2009-02-14 17:36:04 +0100
commit8520b15018ca10e2bc47c1db4f7378df6d3c2e99 (patch)
tree3c0f90e277796b2f1acf740e2560705df010f91d
parent76142d2b8bdb0d5b32ad4e71264f7e0341d312b4 (diff)
r300: Redirect constant TEX coordinates
R3xx/R5xx fragment program texture constants must come from a hardware register instead of the constant file, so we redirect if necessary during the native rewrite phase. The symptoms of this bug started appearing when the Mesa fixed function texenvprogram code started using STATE_CURRENT_ATTRIB constants for texture coordinates when the corresponding attributes were constant across all vertices. Signed-off-by: Nicolai Haehnle <[email protected]>
-rw-r--r--src/mesa/drivers/dri/r300/r300_fragprog.c13
-rw-r--r--src/mesa/drivers/dri/r300/r500_fragprog.c19
2 files changed, 32 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_fragprog.c b/src/mesa/drivers/dri/r300/r300_fragprog.c
index 4ef7f2bd788..8d030c63fb3 100644
--- a/src/mesa/drivers/dri/r300/r300_fragprog.c
+++ b/src/mesa/drivers/dri/r300/r300_fragprog.c
@@ -163,6 +163,19 @@ static GLboolean transform_TEX(
}
}
+ if (inst.SrcReg[0].File != PROGRAM_TEMPORARY && inst.SrcReg[0].File != PROGRAM_INPUT) {
+ int tmpreg = radeonFindFreeTemporary(t);
+ tgt = radeonAppendInstructions(t->Program, 1);
+ tgt->Opcode = OPCODE_MOV;
+ tgt->DstReg.File = PROGRAM_TEMPORARY;
+ tgt->DstReg.Index = tmpreg;
+ tgt->SrcReg[0] = inst.SrcReg[0];
+
+ reset_srcreg(&inst.SrcReg[0]);
+ inst.SrcReg[0].File = PROGRAM_TEMPORARY;
+ inst.SrcReg[0].Index = tmpreg;
+ }
+
tgt = radeonAppendInstructions(t->Program, 1);
_mesa_copy_instructions(tgt, &inst, 1);
diff --git a/src/mesa/drivers/dri/r300/r500_fragprog.c b/src/mesa/drivers/dri/r300/r500_fragprog.c
index 75dae86fa81..926ddd59644 100644
--- a/src/mesa/drivers/dri/r300/r500_fragprog.c
+++ b/src/mesa/drivers/dri/r300/r500_fragprog.c
@@ -31,6 +31,12 @@
#include "radeon_program_alu.h"
+static void reset_srcreg(struct prog_src_register* reg)
+{
+ _mesa_bzero(reg, sizeof(*reg));
+ reg->Swizzle = SWIZZLE_NOOP;
+}
+
static struct prog_src_register shadow_ambient(struct gl_program *program, int tmu)
{
gl_state_index fail_value_tokens[STATE_LENGTH] = {
@@ -99,6 +105,19 @@ static GLboolean transform_TEX(
destredirect = GL_TRUE;
}
+ if (inst.SrcReg[0].File != PROGRAM_TEMPORARY && inst.SrcReg[0].File != PROGRAM_INPUT) {
+ int tmpreg = radeonFindFreeTemporary(t);
+ tgt = radeonAppendInstructions(t->Program, 1);
+ tgt->Opcode = OPCODE_MOV;
+ tgt->DstReg.File = PROGRAM_TEMPORARY;
+ tgt->DstReg.Index = tmpreg;
+ tgt->SrcReg[0] = inst.SrcReg[0];
+
+ reset_srcreg(&inst.SrcReg[0]);
+ inst.SrcReg[0].File = PROGRAM_TEMPORARY;
+ inst.SrcReg[0].Index = tmpreg;
+ }
+
tgt = radeonAppendInstructions(t->Program, 1);
_mesa_copy_instructions(tgt, &inst, 1);