diff options
author | Jason Ekstrand <[email protected]> | 2019-06-04 11:45:50 -0500 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2019-09-20 18:02:15 +0000 |
commit | 651725f7a154e9b33093a2d725a0c2581fbd5480 (patch) | |
tree | 246acdda20b27f509fbad4a2953d2a3f075c7186 | |
parent | 3515c0e9cfce67af442a3de4dbe9bb7f487aaeb5 (diff) |
intel/fs: Allow CLUSTER_BROADCAST to do type conversion
We can't really handle it in the little-core 64-bit case but it's not
really needed there. Where we really want this is for when we need to
do 16 -> 8-bit conversions.
Reviewed-by: Paulo Zanoni <[email protected]>
-rw-r--r-- | src/intel/compiler/brw_fs_generator.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 6756461bc6d..b34280d5c5a 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -2134,7 +2134,6 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width, break; case SHADER_OPCODE_CLUSTER_BROADCAST: { - assert(src[0].type == dst.type); assert(!src[0].negate && !src[0].abs); assert(src[1].file == BRW_IMMEDIATE_VALUE); assert(src[1].type == BRW_REGISTER_TYPE_UD); @@ -2171,6 +2170,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width, * indirect here to handle adding 4 bytes to the offset and avoid * the extra ADD to the register file. */ + assert(src[0].type == dst.type); brw_MOV(p, subscript(dst, BRW_REGISTER_TYPE_D, 0), subscript(strided, BRW_REGISTER_TYPE_D, 0)); brw_MOV(p, subscript(dst, BRW_REGISTER_TYPE_D, 1), |