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authorGiuseppe Bilotta <[email protected]>2016-06-23 19:20:18 +0200
committerChad Versace <[email protected]>2016-06-23 13:55:03 -0700
commit60a27ad122128145d28be37e9c0b0bc86a8e5181 (patch)
treebdd03c1cb36b1fa784f025dc29bbb0596708ad75
parent5d0799831725e67a224ef3cbb4ead39e2cebc7e6 (diff)
Remove wrongly repeated words in comments
Clean up misrepetitions ('if if', 'the the' etc) found throughout the comments. This has been done manually, after grepping case-insensitively for duplicate if, is, the, then, do, for, an, plus a few other typos corrected in fly-by v2: * proper commit message and non-joke title; * replace two 'as is' followed by 'is' to 'as-is'. v3: * 'a integer' => 'an integer' and similar (originally spotted by Jason Ekstrand, I fixed a few other similar ones while at it) Signed-off-by: Giuseppe Bilotta <[email protected]> Reviewed-by: Chad Versace <[email protected]>
-rw-r--r--include/GL/mesa_glinterop.h6
-rw-r--r--src/compiler/glsl/ast_to_hir.cpp2
-rw-r--r--src/compiler/glsl/glsl_to_nir.cpp2
-rw-r--r--src/compiler/nir/nir.h2
-rw-r--r--src/compiler/nir/nir_instr_set.c2
-rw-r--r--src/compiler/nir/nir_intrinsics.h4
-rw-r--r--src/compiler/nir/nir_lower_vars_to_ssa.c2
-rw-r--r--src/compiler/nir/nir_lower_wpos_ytransform.c2
-rw-r--r--src/compiler/nir/nir_opt_dead_cf.c2
-rw-r--r--src/compiler/spirv/spirv_to_nir.c2
-rw-r--r--src/gallium/docs/source/context.rst2
-rw-r--r--src/gallium/drivers/freedreno/freedreno_texture.h2
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3.c2
-rw-r--r--src/gallium/drivers/llvmpipe/lp_state_derived.c2
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_util.h2
-rw-r--r--src/gallium/drivers/nouveau/nouveau_buffer.c2
-rw-r--r--src/gallium/drivers/r300/compiler/radeon_dataflow.c2
-rw-r--r--src/gallium/drivers/r300/compiler/radeon_vert_fc.c2
-rw-r--r--src/gallium/drivers/softpipe/sp_state_derived.c4
-rw-r--r--src/gallium/drivers/svga/svga_format.c2
-rw-r--r--src/gallium/drivers/svga/svga_tgsi_vgpu10.c2
-rw-r--r--src/gallium/drivers/swr/rasterizer/core/backend.h4
-rw-r--r--src/gallium/drivers/swr/rasterizer/core/state.h2
-rw-r--r--src/gallium/drivers/swr/rasterizer/core/threads.cpp2
-rw-r--r--src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c2
-rw-r--r--src/gallium/drivers/vc4/vc4_qir_schedule.c2
-rw-r--r--src/gallium/include/pipe/p_video_codec.h6
-rw-r--r--src/gallium/state_trackers/nine/device9.c2
-rw-r--r--src/gbm/main/gbm.c2
-rw-r--r--src/glx/indirect_glx.c2
-rw-r--r--src/gtest/include/gtest/internal/gtest-port.h2
-rw-r--r--src/gtest/src/gtest.cc2
-rw-r--r--src/mesa/drivers/dri/i965/brw_device_info.h2
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp2
-rw-r--r--src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_performance_monitor.c2
-rw-r--r--src/mesa/drivers/x11/xm_buffer.c2
-rw-r--r--src/mesa/main/dlist.c2
-rw-r--r--src/mesa/main/formatquery.c2
-rw-r--r--src/mesa/main/imports.h2
-rw-r--r--src/mesa/main/texobj.c2
-rw-r--r--src/mesa/program/ir_to_mesa.cpp2
-rw-r--r--src/mesa/state_tracker/st_atom_msaa.c2
-rw-r--r--src/mesa/state_tracker/st_cb_fbo.c2
-rw-r--r--src/mesa/state_tracker/st_glsl_to_tgsi.cpp4
-rw-r--r--src/mesa/state_tracker/st_mesa_to_tgsi.c2
46 files changed, 54 insertions, 54 deletions
diff --git a/include/GL/mesa_glinterop.h b/include/GL/mesa_glinterop.h
index c0c20d6fa66..383d7f91aa8 100644
--- a/include/GL/mesa_glinterop.h
+++ b/include/GL/mesa_glinterop.h
@@ -97,7 +97,7 @@ struct mesa_glinterop_device_info {
/* The callee will overwrite it if it supports a lower version.
*
* The caller should check the value and access up-to the version supported
- * by the the callee.
+ * by the callee.
*/
/* NOTE: Do not use the MESA_GLINTEROP_DEVICE_INFO_VERSION macro */
uint32_t version;
@@ -125,7 +125,7 @@ struct mesa_glinterop_export_in {
/* The callee will overwrite it if it supports a lower version.
*
* The caller should check the value and access up-to the version supported
- * by the the callee.
+ * by the callee.
*/
/* NOTE: Do not use the MESA_GLINTEROP_EXPORT_IN_VERSION macro */
uint32_t version;
@@ -190,7 +190,7 @@ struct mesa_glinterop_export_out {
/* The callee will overwrite it if it supports a lower version.
*
* The caller should check the value and access up-to the version supported
- * by the the callee.
+ * by the callee.
*/
/* NOTE: Do not use the MESA_GLINTEROP_EXPORT_OUT_VERSION macro */
uint32_t version;
diff --git a/src/compiler/glsl/ast_to_hir.cpp b/src/compiler/glsl/ast_to_hir.cpp
index 7da734c1d07..0cfce6893ee 100644
--- a/src/compiler/glsl/ast_to_hir.cpp
+++ b/src/compiler/glsl/ast_to_hir.cpp
@@ -1276,7 +1276,7 @@ void
ast_expression::set_is_lhs(bool new_value)
{
/* is_lhs is tracked only to print "variable used uninitialized" warnings,
- * if we lack a identifier we can just skip it.
+ * if we lack an identifier we can just skip it.
*/
if (this->primary_expression.identifier == NULL)
return;
diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp
index 16d0c1d54d2..a22fd5b3e08 100644
--- a/src/compiler/glsl/glsl_to_nir.cpp
+++ b/src/compiler/glsl/glsl_to_nir.cpp
@@ -1950,7 +1950,7 @@ void
nir_visitor::visit(ir_constant *ir)
{
/*
- * We don't know if this variable is an an array or struct that gets
+ * We don't know if this variable is an array or struct that gets
* dereferenced, so do the safe thing an make it a variable with a
* constant initializer and return a dereference.
*/
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 1725ee3de0a..94dee4db351 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -804,7 +804,7 @@ typedef struct {
} nir_deref_var;
/* This enum describes how the array is referenced. If the deref is
- * direct then the base_offset is used. If the deref is indirect then then
+ * direct then the base_offset is used. If the deref is indirect then
* offset is given by base_offset + indirect. If the deref is a wildcard
* then the deref refers to all of the elements of the array at the same
* time. Wildcard dereferences are only ever allowed in copy_var
diff --git a/src/compiler/nir/nir_instr_set.c b/src/compiler/nir/nir_instr_set.c
index f93ec9ddc09..45f42bf25e2 100644
--- a/src/compiler/nir/nir_instr_set.c
+++ b/src/compiler/nir/nir_instr_set.c
@@ -514,7 +514,7 @@ nir_instr_set_add_or_rewrite(struct set *instr_set, nir_instr *instr)
nir_instr *match = (nir_instr *) entry->key;
nir_ssa_def *new_def = nir_instr_get_dest_ssa_def(match);
- /* It's safe to replace a exact instruction with an inexact one as
+ /* It's safe to replace an exact instruction with an inexact one as
* long as we make it exact. If we got here, the two instructions are
* exactly identical in every other way so, once we've set the exact
* bit, they are the same.
diff --git a/src/compiler/nir/nir_intrinsics.h b/src/compiler/nir/nir_intrinsics.h
index 6f86c9f95f2..d88ec3cb58b 100644
--- a/src/compiler/nir/nir_intrinsics.h
+++ b/src/compiler/nir/nir_intrinsics.h
@@ -48,9 +48,9 @@ INTRINSIC(copy_var, 0, ARR(0), false, 0, 2, 0, xx, xx, xx, 0)
/*
* Interpolation of input. The interp_var_at* intrinsics are similar to the
- * load_var intrinsic acting an a shader input except that they interpolate
+ * load_var intrinsic acting on a shader input except that they interpolate
* the input differently. The at_sample and at_offset intrinsics take an
- * aditional source that is a integer sample id or a vec2 position offset
+ * additional source that is an integer sample id or a vec2 position offset
* respectively.
*/
diff --git a/src/compiler/nir/nir_lower_vars_to_ssa.c b/src/compiler/nir/nir_lower_vars_to_ssa.c
index d62cec014aa..317647bf9e4 100644
--- a/src/compiler/nir/nir_lower_vars_to_ssa.c
+++ b/src/compiler/nir/nir_lower_vars_to_ssa.c
@@ -621,7 +621,7 @@ rename_variables_block(nir_block *block, struct lower_variables_state *state)
* fully-direct references we see and store them in the
* direct_deref_nodes hash table.
*
- * 2) Walk over the the list of fully-qualified direct derefs generated in
+ * 2) Walk over the list of fully-qualified direct derefs generated in
* the previous pass. For each deref, we determine if it can ever be
* aliased, i.e. if there is an indirect reference anywhere that may
* refer to it. If it cannot be aliased, we mark it for lowering to an
diff --git a/src/compiler/nir/nir_lower_wpos_ytransform.c b/src/compiler/nir/nir_lower_wpos_ytransform.c
index ccf0fd351a7..173f0585729 100644
--- a/src/compiler/nir/nir_lower_wpos_ytransform.c
+++ b/src/compiler/nir/nir_lower_wpos_ytransform.c
@@ -159,7 +159,7 @@ lower_fragcoord(lower_wpos_ytransform_state *state, nir_intrinsic_instr *intr)
*
* The bias of the y-coordinate depends on whether y-inversion takes place
* (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
- * drawing to an FBO (causes additional inversion), and whether the the pipe
+ * drawing to an FBO (causes additional inversion), and whether the pipe
* driver origin and the requested origin differ (the latter condition is
* stored in the 'invert' variable).
*
diff --git a/src/compiler/nir/nir_opt_dead_cf.c b/src/compiler/nir/nir_opt_dead_cf.c
index 74af19b8428..81c1b650da9 100644
--- a/src/compiler/nir/nir_opt_dead_cf.c
+++ b/src/compiler/nir/nir_opt_dead_cf.c
@@ -30,7 +30,7 @@
/*
* This file implements an optimization that deletes statically
- * unreachable/dead code. In NIR, one way this can happen if if an if
+ * unreachable/dead code. In NIR, one way this can happen is when an if
* statement has a constant condition:
*
* if (true) {
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index f1bbfd511ff..85f53a0fdc8 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -2458,7 +2458,7 @@ vtn_handle_execution_mode(struct vtn_builder *b, struct vtn_value *entry_point,
b->shader->info.cs.local_size[2] = mode->literals[2];
break;
case SpvExecutionModeLocalSizeHint:
- break; /* Nothing do do with this */
+ break; /* Nothing to do with this */
case SpvExecutionModeOutputVertices:
assert(b->shader->stage == MESA_SHADER_GEOMETRY);
diff --git a/src/gallium/docs/source/context.rst b/src/gallium/docs/source/context.rst
index 6f09c559b60..05c6f11ea48 100644
--- a/src/gallium/docs/source/context.rst
+++ b/src/gallium/docs/source/context.rst
@@ -234,7 +234,7 @@ include several layers), this surface need not be bound to the framebuffer.
``clear_depth_stencil`` clears a single depth, stencil or depth/stencil surface
with the specified depth and stencil values (for combined depth/stencil buffers,
-is is also possible to only clear one or the other part). While it is only
+it is also possible to only clear one or the other part). While it is only
possible to clear one surface at a time (which can include several layers),
this surface need not be bound to the framebuffer.
diff --git a/src/gallium/drivers/freedreno/freedreno_texture.h b/src/gallium/drivers/freedreno/freedreno_texture.h
index fa27d1c32af..b52e27d07a0 100644
--- a/src/gallium/drivers/freedreno/freedreno_texture.h
+++ b/src/gallium/drivers/freedreno/freedreno_texture.h
@@ -55,7 +55,7 @@ struct fd_texture_stateobj;
* | fp16[3] /
* 0x08: | padding
* 0x10: | int16[0] \
- * | int16[1] |___ swizzled int16 channels for for "small integer"
+ * | int16[1] |___ swizzled int16 channels for "small integer"
* | int16[2] | formats (<= 16 bits per component, integer)
* | int16[3] /
* 0x18: | padding
diff --git a/src/gallium/drivers/freedreno/ir3/ir3.c b/src/gallium/drivers/freedreno/ir3/ir3.c
index a01df3bf6b3..78ec1cc483e 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3.c
@@ -573,7 +573,7 @@ void * ir3_assemble(struct ir3 *shader, struct ir3_info *info,
}
}
- /* need a integer number of instruction "groups" (sets of 16
+ /* need an integer number of instruction "groups" (sets of 16
* instructions on a4xx or sets of 4 instructions on a3xx),
* so pad out w/ NOPs if needed: (NOTE each instruction is 64bits)
*/
diff --git a/src/gallium/drivers/llvmpipe/lp_state_derived.c b/src/gallium/drivers/llvmpipe/lp_state_derived.c
index f76de6b1ea4..fa9d4fb2fdf 100644
--- a/src/gallium/drivers/llvmpipe/lp_state_derived.c
+++ b/src/gallium/drivers/llvmpipe/lp_state_derived.c
@@ -116,7 +116,7 @@ compute_vertex_info(struct llvmpipe_context *llvmpipe)
/*
* Note that we'd actually want to skip position (as we won't use
* the attribute in the fs) but can't. The reason is that we don't
- * actually have a input/output map for setup (even though it looks
+ * actually have an input/output map for setup (even though it looks
* like we do...). Could adjust for this though even without a map
* (in llvmpipe_create_fs_state()).
*/
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_util.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_util.h
index fa2c4804a42..7b0de856c20 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_util.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_util.h
@@ -199,7 +199,7 @@ public:
virtual void erase();
virtual bool insert(void *data);
- // move item to a another list, no consistency with its iterators though
+ // move item to another list, no consistency with its iterators though
void moveToList(DLList&);
private:
diff --git a/src/gallium/drivers/nouveau/nouveau_buffer.c b/src/gallium/drivers/nouveau/nouveau_buffer.c
index 2db538c70af..7c1421b5815 100644
--- a/src/gallium/drivers/nouveau/nouveau_buffer.c
+++ b/src/gallium/drivers/nouveau/nouveau_buffer.c
@@ -163,7 +163,7 @@ nouveau_transfer_staging(struct nouveau_context *nv,
return tx->map;
}
-/* Copies data from the resource into the the transfer's temporary GART
+/* Copies data from the resource into the transfer's temporary GART
* buffer. Also updates buf->data if present.
*
* Maybe just migrate to GART right away if we actually need to do this. */
diff --git a/src/gallium/drivers/r300/compiler/radeon_dataflow.c b/src/gallium/drivers/r300/compiler/radeon_dataflow.c
index a8decacedaf..03127eb63bd 100644
--- a/src/gallium/drivers/r300/compiler/radeon_dataflow.c
+++ b/src/gallium/drivers/r300/compiler/radeon_dataflow.c
@@ -850,7 +850,7 @@ static void init_get_readers_callback_data(
* of the loop it reads the value written by instruction 0 and in all other
* iterations it reads the value written by instruction 3.
*
- * @param read_cb This function will be called for for every instruction that
+ * @param read_cb This function will be called for every instruction that
* has been determined to be a reader of writer.
* @param write_cb This function will be called for every instruction after
* writer.
diff --git a/src/gallium/drivers/r300/compiler/radeon_vert_fc.c b/src/gallium/drivers/r300/compiler/radeon_vert_fc.c
index 479101ec5d7..fded485aaa9 100644
--- a/src/gallium/drivers/r300/compiler/radeon_vert_fc.c
+++ b/src/gallium/drivers/r300/compiler/radeon_vert_fc.c
@@ -134,7 +134,7 @@ static void lower_bgnloop(
} else {
fc_state->PredStack[fc_state->LoopDepth] =
fc_state->PredicateReg;
- /* Copy the the current predicate value to this loop's
+ /* Copy the current predicate value to this loop's
* predicate register */
/* Use the old predicate value for src0 */
diff --git a/src/gallium/drivers/softpipe/sp_state_derived.c b/src/gallium/drivers/softpipe/sp_state_derived.c
index 9b1d283b4ff..0083e332785 100644
--- a/src/gallium/drivers/softpipe/sp_state_derived.c
+++ b/src/gallium/drivers/softpipe/sp_state_derived.c
@@ -176,14 +176,14 @@ softpipe_compute_vertex_info(struct softpipe_context *softpipe)
/*
* Note that we'd actually want to skip position (as we won't use
* the attribute in the fs) but can't. The reason is that we don't
- * actually have a input/output map for setup (even though it looks
+ * actually have an input/output map for setup (even though it looks
* like we do...). Could adjust for this though even without a map.
*/
} else {
/*
* Note that we'd actually want to skip position (as we won't use
* the attribute in the fs) but can't. The reason is that we don't
- * actually have a input/output map for setup (even though it looks
+ * actually have an input/output map for setup (even though it looks
* like we do...). Could adjust for this though even without a map.
*/
draw_emit_vertex_attr(vinfo, EMIT_4F, vs_index);
diff --git a/src/gallium/drivers/svga/svga_format.c b/src/gallium/drivers/svga/svga_format.c
index 2fc920add64..4662bef2ff9 100644
--- a/src/gallium/drivers/svga/svga_format.c
+++ b/src/gallium/drivers/svga/svga_format.c
@@ -1916,7 +1916,7 @@ svga_format_size(SVGA3dSurfaceFormat format,
*block_width = format_cap_table[format].block_width;
*block_height = format_cap_table[format].block_height;
*bytes_per_block = format_cap_table[format].block_bytes;
- /* Make sure the the table entry was valid */
+ /* Make sure the table entry was valid */
if (*block_width == 0)
debug_printf("Bad table entry for %s\n", svga_format_name(format));
assert(*block_width);
diff --git a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c b/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
index 8639333707f..dcd8f2cc3b8 100644
--- a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
+++ b/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
@@ -1762,7 +1762,7 @@ alloc_immediate_float4(struct svga_shader_emitter_v10 *emit,
/**
- * Allocate space for a int[4] immediate.
+ * Allocate space for an int[4] immediate.
* \return the index/position of the immediate.
*/
static unsigned
diff --git a/src/gallium/drivers/swr/rasterizer/core/backend.h b/src/gallium/drivers/swr/rasterizer/core/backend.h
index 81dbe53517c..8a289c70265 100644
--- a/src/gallium/drivers/swr/rasterizer/core/backend.h
+++ b/src/gallium/drivers/swr/rasterizer/core/backend.h
@@ -208,13 +208,13 @@ INLINE void generateInputCoverage(const uint64_t *const coverageMask, uint32_t (
mask[0] = _mm256_set_epi8(-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 0xC, 0x8, 0x4, 0x0,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 0xC, 0x8, 0x4, 0x0);
- // pull out the the 8bit 4x2 coverage for samples 0-7 into the lower 32 bits of each 128bit lane
+ // pull out the 8bit 4x2 coverage for samples 0-7 into the lower 32 bits of each 128bit lane
__m256i packedCoverage0 = _simd_shuffle_epi8(sampleCoverage[0], mask[0]);
__m256i packedCoverage1;
if(T::MultisampleT::numSamples > 8)
{
- // pull out the the 8bit 4x2 coverage for samples 8-15 into the lower 32 bits of each 128bit lane
+ // pull out the 8bit 4x2 coverage for samples 8-15 into the lower 32 bits of each 128bit lane
packedCoverage1 = _simd_shuffle_epi8(sampleCoverage[1], mask[0]);
}
diff --git a/src/gallium/drivers/swr/rasterizer/core/state.h b/src/gallium/drivers/swr/rasterizer/core/state.h
index bfa9929e0b4..dc6cb3ca43a 100644
--- a/src/gallium/drivers/swr/rasterizer/core/state.h
+++ b/src/gallium/drivers/swr/rasterizer/core/state.h
@@ -627,7 +627,7 @@ struct SWR_STREAMOUT_STATE
// The stream masks specify which attributes are sent to which streams.
// These masks help the FE to setup the pPrimData buffer that is passed
- // the the Stream Output Shader (SOS) function.
+ // the Stream Output Shader (SOS) function.
uint32_t streamMasks[MAX_SO_STREAMS];
// Number of attributes, including position, per vertex that are streamed out.
diff --git a/src/gallium/drivers/swr/rasterizer/core/threads.cpp b/src/gallium/drivers/swr/rasterizer/core/threads.cpp
index 9671f7781d7..7e76c4bdda7 100644
--- a/src/gallium/drivers/swr/rasterizer/core/threads.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/threads.cpp
@@ -445,7 +445,7 @@ void WorkOnFifoBE(
for (uint32_t tileID : macroTiles)
{
- // Only work on tiles for for this numa node
+ // Only work on tiles for this numa node
uint32_t x, y;
pDC->pTileMgr->getTileIndices(tileID, x, y);
if (((x ^ y) & numaMask) != numaNode)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c b/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
index 868a0ad1a3a..2f4f8e886cb 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_validate_shaders.c
@@ -163,7 +163,7 @@ check_tmu_write(uint64_t inst,
return false;
}
- /* We assert that the the clamped address is the first
+ /* We assert that the clamped address is the first
* argument, and the UBO base address is the second argument.
* This is arbitrary, but simpler than supporting flipping the
* two either way.
diff --git a/src/gallium/drivers/vc4/vc4_qir_schedule.c b/src/gallium/drivers/vc4/vc4_qir_schedule.c
index 4a1283c5718..c86df8359de 100644
--- a/src/gallium/drivers/vc4/vc4_qir_schedule.c
+++ b/src/gallium/drivers/vc4/vc4_qir_schedule.c
@@ -407,7 +407,7 @@ choose_instruction(struct schedule_state *state)
}
/* If we would block on the previously chosen node, but would
- * block less on this one, then then prefer it.
+ * block less on this one, then prefer it.
*/
if (chosen->unblocked_time > state->time &&
n->unblocked_time < chosen->unblocked_time) {
diff --git a/src/gallium/include/pipe/p_video_codec.h b/src/gallium/include/pipe/p_video_codec.h
index b4b2b9c9677..ab8b4fcb605 100644
--- a/src/gallium/include/pipe/p_video_codec.h
+++ b/src/gallium/include/pipe/p_video_codec.h
@@ -134,17 +134,17 @@ struct pipe_video_buffer
void (*destroy)(struct pipe_video_buffer *buffer);
/**
- * get a individual sampler view for each plane
+ * get an individual sampler view for each plane
*/
struct pipe_sampler_view **(*get_sampler_view_planes)(struct pipe_video_buffer *buffer);
/**
- * get a individual sampler view for each component
+ * get an individual sampler view for each component
*/
struct pipe_sampler_view **(*get_sampler_view_components)(struct pipe_video_buffer *buffer);
/**
- * get a individual surfaces for each plane
+ * get an individual surfaces for each plane
*/
struct pipe_surface **(*get_surfaces)(struct pipe_video_buffer *buffer);
diff --git a/src/gallium/state_trackers/nine/device9.c b/src/gallium/state_trackers/nine/device9.c
index 20a0ce064f5..bb1735aae7b 100644
--- a/src/gallium/state_trackers/nine/device9.c
+++ b/src/gallium/state_trackers/nine/device9.c
@@ -236,7 +236,7 @@ NineDevice9_ctor( struct NineDevice9 *This,
NineUnknown_ConvertRefToBind(NineUnknown(This->state.rt[i]));
}
- /* Initialize a dummy VBO to be used when a a vertex declaration does not
+ /* Initialize a dummy VBO to be used when a vertex declaration does not
* specify all the inputs needed by vertex shader, on win default behavior
* is to pass 0,0,0,0 to the shader */
{
diff --git a/src/gbm/main/gbm.c b/src/gbm/main/gbm.c
index 0f4657af701..6be5b699f18 100644
--- a/src/gbm/main/gbm.c
+++ b/src/gbm/main/gbm.c
@@ -361,7 +361,7 @@ gbm_bo_create(struct gbm_device *gbm,
* GBM_BO_IMPORT_EGL_IMAGE
* GBM_BO_IMPORT_FD
*
- * The the gbm bo shares the underlying pixels but its life-time is
+ * The gbm bo shares the underlying pixels but its life-time is
* independent of the foreign object.
*
* \param gbm The gbm device returned from gbm_create_device()
diff --git a/src/glx/indirect_glx.c b/src/glx/indirect_glx.c
index bb121f85b40..1991f70251b 100644
--- a/src/glx/indirect_glx.c
+++ b/src/glx/indirect_glx.c
@@ -169,7 +169,7 @@ indirect_unbind_context(struct glx_context *gc, struct glx_context *new)
if (gc == new)
return;
- /* We are either switching to no context, away from a indirect
+ /* We are either switching to no context, away from an indirect
* context to a direct context or from one dpy to another and have
* to send a request to the dpy to unbind the previous context.
*/
diff --git a/src/gtest/include/gtest/internal/gtest-port.h b/src/gtest/include/gtest/internal/gtest-port.h
index dc4fe0cb6b8..90e06525f63 100644
--- a/src/gtest/include/gtest/internal/gtest-port.h
+++ b/src/gtest/include/gtest/internal/gtest-port.h
@@ -176,7 +176,7 @@
// string.
//
// Integer types:
-// TypeWithSize - maps an integer to a int type.
+// TypeWithSize - maps an integer to an int type.
// Int32, UInt32, Int64, UInt64, TimeInMillis
// - integers of known sizes.
// BiggestInt - the biggest signed integer type.
diff --git a/src/gtest/src/gtest.cc b/src/gtest/src/gtest.cc
index 6de53dd0198..0f4aa93e7b3 100644
--- a/src/gtest/src/gtest.cc
+++ b/src/gtest/src/gtest.cc
@@ -1461,7 +1461,7 @@ std::string CodePointToUtf8(UInt32 code_point) {
return str;
}
-// The following two functions only make sense if the the system
+// The following two functions only make sense if the system
// uses UTF-16 for wide string encoding. All supported systems
// with 16 bit wchar_t (Windows, Cygwin, Symbian OS) do use UTF-16.
diff --git a/src/mesa/drivers/dri/i965/brw_device_info.h b/src/mesa/drivers/dri/i965/brw_device_info.h
index 4e7f3135960..0869063df32 100644
--- a/src/mesa/drivers/dri/i965/brw_device_info.h
+++ b/src/mesa/drivers/dri/i965/brw_device_info.h
@@ -73,7 +73,7 @@ struct brw_device_info
* In general, you can find shader thread maximums by looking at the "Maximum
* Number of Threads" field in the Intel PRM description of the 3DSTATE_VS,
* 3DSTATE_GS, 3DSTATE_HS, 3DSTATE_DS, and 3DSTATE_PS commands. URB entry
- * limits come from the "Number of URB Entries" field in the the
+ * limits come from the "Number of URB Entries" field in the
* 3DSTATE_URB_VS command and friends.
*
* These fields are used to calculate the scratch space to allocate. The
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 17673f8947c..51f163418ce 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1180,7 +1180,7 @@ fs_visitor::emit_general_interpolation(fs_reg *attr, const char *name,
/* Data starts at suboffet 3 in 32-bit units (12 bytes), so it is not
* 64-bit aligned and the current implementation fails to read the
- * data properly. Instead, when there is is a double input varying,
+ * data properly. Instead, when there is a double input varying,
* read it as vector of floats with twice the number of components.
*/
if (attr->type == BRW_REGISTER_TYPE_DF) {
diff --git a/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c b/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c
index 86fcdd4789a..14a9a0faca2 100644
--- a/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c
+++ b/src/mesa/drivers/dri/i965/brw_nir_opt_peephole_ffma.c
@@ -113,7 +113,7 @@ get_mul_for_src(nir_alu_src *src, int num_components,
break;
case nir_op_fmul:
- /* Only absorb a fmul into a ffma if the fmul is is only used in fadd
+ /* Only absorb a fmul into a ffma if the fmul is only used in fadd
* operations. This prevents us from being too aggressive with our
* fusing which can actually lead to more instructions.
*/
diff --git a/src/mesa/drivers/dri/i965/brw_performance_monitor.c b/src/mesa/drivers/dri/i965/brw_performance_monitor.c
index a91c6e2047a..cb1ab4c5d40 100644
--- a/src/mesa/drivers/dri/i965/brw_performance_monitor.c
+++ b/src/mesa/drivers/dri/i965/brw_performance_monitor.c
@@ -1016,7 +1016,7 @@ wrap_bookend_bo(struct brw_context *brw)
}
/* This is fairly arbitrary; the trade off is memory usage vs. extra overhead
- * from wrapping. On Gen7, 32768 should be enough for for 128 snapshots before
+ * from wrapping. On Gen7, 32768 should be enough for 128 snapshots before
* wrapping (since each is 256 bytes).
*/
#define BOOKEND_BO_SIZE_BYTES 32768
diff --git a/src/mesa/drivers/x11/xm_buffer.c b/src/mesa/drivers/x11/xm_buffer.c
index f6e14270a47..4d52169d777 100644
--- a/src/mesa/drivers/x11/xm_buffer.c
+++ b/src/mesa/drivers/x11/xm_buffer.c
@@ -451,7 +451,7 @@ xmesa_MapRenderbuffer(struct gl_context *ctx,
assert(xrb->pixmap);
- /* Install error handler for XGetImage() in case the the window
+ /* Install error handler for XGetImage() in case the window
* isn't mapped. If we fail we'll create a temporary XImage.
*/
mesaXErrorFlag = 0;
diff --git a/src/mesa/main/dlist.c b/src/mesa/main/dlist.c
index 4e4b1385c0b..3845d2e1214 100644
--- a/src/mesa/main/dlist.c
+++ b/src/mesa/main/dlist.c
@@ -6026,7 +6026,7 @@ save_MultiTexCoord4fv(GLenum target, const GLfloat * v)
/**
- * Record a GL_INVALID_VALUE error when a invalid vertex attribute
+ * Record a GL_INVALID_VALUE error when an invalid vertex attribute
* index is found.
*/
static void
diff --git a/src/mesa/main/formatquery.c b/src/mesa/main/formatquery.c
index f524619d98e..ad3ae56f11b 100644
--- a/src/mesa/main/formatquery.c
+++ b/src/mesa/main/formatquery.c
@@ -559,7 +559,7 @@ _is_internalformat_supported(struct gl_context *ctx, GLenum target,
*/
GLint buffer[1];
- /* At this point a internalformat is valid if it is valid as a texture or
+ /* At this point an internalformat is valid if it is valid as a texture or
* as a renderbuffer format. The checks are different because those methods
* return different values when passing non supported internalformats */
if (_mesa_base_tex_format(ctx, internalformat) < 0 &&
diff --git a/src/mesa/main/imports.h b/src/mesa/main/imports.h
index 4ff5941487f..05cc5cad593 100644
--- a/src/mesa/main/imports.h
+++ b/src/mesa/main/imports.h
@@ -73,7 +73,7 @@ extern "C" {
/**
* Sometimes we treat GLfloats as GLints. On x86 systems, moving a float
- * as a int (thereby using integer registers instead of FP registers) is
+ * as an int (thereby using integer registers instead of FP registers) is
* a performance win. Typically, this can be done with ordinary casts.
* But with gcc's -fstrict-aliasing flag (which defaults to on in gcc 3.0)
* these casts generate warnings.
diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c
index ed630bd0dd1..722549d5da9 100644
--- a/src/mesa/main/texobj.c
+++ b/src/mesa/main/texobj.c
@@ -1196,7 +1196,7 @@ invalidate_tex_image_error_check(struct gl_context *ctx, GLuint texture,
* glCreateTextures should throw errors if target = 0. This is not exposed to
* the rest of Mesa to encourage Mesa internals to use nameless textures,
* which do not require expensive hash lookups.
- * \param target either 0 or a a valid / error-checked texture target enum
+ * \param target either 0 or a valid / error-checked texture target enum
*/
static void
create_textures(struct gl_context *ctx, GLenum target,
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 3a5f05837af..cf47c0d9348 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -1975,7 +1975,7 @@ ir_to_mesa_visitor::visit(ir_texture *ir)
ir->coordinate->accept(this);
/* Put our coords in a temp. We'll need to modify them for shadow,
- * projection, or LOD, so the only case we'd use it as is is if
+ * projection, or LOD, so the only case we'd use it as-is is if
* we're doing plain old texturing. Mesa IR optimization should
* handle cleaning up our mess in that case.
*/
diff --git a/src/mesa/state_tracker/st_atom_msaa.c b/src/mesa/state_tracker/st_atom_msaa.c
index 703cb5e755c..404f54ddcc3 100644
--- a/src/mesa/state_tracker/st_atom_msaa.c
+++ b/src/mesa/state_tracker/st_atom_msaa.c
@@ -54,7 +54,7 @@ static void update_sample_mask( struct st_context *st )
/* there's lot of ways how to do this. We just use first few bits,
since we have no knowledge of sample positions here. When
app-supplied mask though is used too might need to be smarter.
- Also, there's a interface restriction here in theory it is
+ Also, there's an interface restriction here in theory it is
encouraged this mask not be the same at each pixel. */
sample_mask = (1 << nr_bits) - 1;
if (st->ctx->Multisample.SampleCoverageInvert)
diff --git a/src/mesa/state_tracker/st_cb_fbo.c b/src/mesa/state_tracker/st_cb_fbo.c
index a53b95a6582..9801b1fe108 100644
--- a/src/mesa/state_tracker/st_cb_fbo.c
+++ b/src/mesa/state_tracker/st_cb_fbo.c
@@ -266,7 +266,7 @@ st_new_renderbuffer(struct gl_context *ctx, GLuint name)
/**
- * Allocate a renderbuffer for a an on-screen window (not a user-created
+ * Allocate a renderbuffer for an on-screen window (not a user-created
* renderbuffer). The window system code determines the format.
*/
struct gl_renderbuffer *
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 9de603c042f..07ec91a7e4f 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -3877,7 +3877,7 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir)
ir->coordinate->accept(this);
/* Put our coords in a temp. We'll need to modify them for shadow,
- * projection, or LOD, so the only case we'd use it as is is if
+ * projection, or LOD, so the only case we'd use it as-is is if
* we're doing plain old texturing. The optimization passes on
* glsl_to_tgsi_visitor should handle cleaning up our mess in that case.
*/
@@ -5832,7 +5832,7 @@ emit_wpos(struct st_context *st,
*
* The bias of the y-coordinate depends on whether y-inversion takes place
* (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
- * drawing to an FBO (causes additional inversion), and whether the the pipe
+ * drawing to an FBO (causes additional inversion), and whether the pipe
* driver origin and the requested origin differ (the latter condition is
* stored in the 'invert' variable).
*
diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c
index f7507e52ccf..b9892577208 100644
--- a/src/mesa/state_tracker/st_mesa_to_tgsi.c
+++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c
@@ -830,7 +830,7 @@ emit_wpos(struct st_context *st,
*
* The bias of the y-coordinate depends on whether y-inversion takes place
* (adjY[1]) or not (adjY[0]), which is in turn dependent on whether we are
- * drawing to an FBO (causes additional inversion), and whether the the pipe
+ * drawing to an FBO (causes additional inversion), and whether the pipe
* driver origin and the requested origin differ (the latter condition is
* stored in the 'invert' variable).
*