diff options
author | Rob Clark <[email protected]> | 2018-09-06 08:44:52 -0400 |
---|---|---|
committer | Rob Clark <[email protected]> | 2018-09-27 15:26:32 -0400 |
commit | 5bb96bf73a1b2a9978c4cb766477e453610345f1 (patch) | |
tree | 2152e6961738d0f21c51d78b739b915e0251dc32 | |
parent | a7fa44cd33378c6058b8069e6edcae1963c96bd3 (diff) |
freedreno: simplify pctx->clear()
This is defined to always clear the entire surface(s) specified,
regardless of scissor state.. mesa/st will turn scissored clears
into a draw. So rip about a bunch of unnecessary machinery.
Also remove a comment that was obsolete since using u_blitter to
turn clear into draw (for the cases where there isn't a hw blitter
fast-path).
Signed-off-by: Rob Clark <[email protected]>
-rw-r--r-- | src/gallium/drivers/freedreno/a5xx/fd5_draw.c | 6 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/a6xx/fd6_draw.c | 5 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/freedreno_batch.c | 6 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/freedreno_batch.h | 10 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/freedreno_draw.c | 28 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/freedreno_gmem.c | 30 |
6 files changed, 11 insertions, 74 deletions
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c index aa06b3c7148..96ff1a35945 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_draw.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_draw.c @@ -271,17 +271,11 @@ fd5_clear(struct fd_context *ctx, unsigned buffers, { struct fd_ringbuffer *ring = ctx->batch->draw; struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer; - struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx); if ((buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) && is_z32(pfb->zsbuf->format)) return false; - ctx->batch->max_scissor.minx = MIN2(ctx->batch->max_scissor.minx, scissor->minx); - ctx->batch->max_scissor.miny = MIN2(ctx->batch->max_scissor.miny, scissor->miny); - ctx->batch->max_scissor.maxx = MAX2(ctx->batch->max_scissor.maxx, scissor->maxx); - ctx->batch->max_scissor.maxy = MAX2(ctx->batch->max_scissor.maxy, scissor->maxy); - fd5_emit_render_cntl(ctx, true, false); if (buffers & PIPE_CLEAR_COLOR) { diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c index 5c5667515ce..3b399953abe 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c @@ -351,11 +351,6 @@ fd6_clear(struct fd_context *ctx, unsigned buffers, is_z32(pfb->zsbuf->format)) return false; - ctx->batch->max_scissor.minx = MIN2(ctx->batch->max_scissor.minx, scissor->minx); - ctx->batch->max_scissor.miny = MIN2(ctx->batch->max_scissor.miny, scissor->miny); - ctx->batch->max_scissor.maxx = MAX2(ctx->batch->max_scissor.maxx, scissor->maxx); - ctx->batch->max_scissor.maxy = MAX2(ctx->batch->max_scissor.maxy, scissor->maxy); - fd6_emit_render_cntl(ctx, true, false); OUT_PKT4(ring, REG_A6XX_RB_BLIT_SCISSOR_TL, 2); diff --git a/src/gallium/drivers/freedreno/freedreno_batch.c b/src/gallium/drivers/freedreno/freedreno_batch.c index 8dc0d7c612a..b3d14665a21 100644 --- a/src/gallium/drivers/freedreno/freedreno_batch.c +++ b/src/gallium/drivers/freedreno/freedreno_batch.c @@ -69,7 +69,7 @@ batch_init(struct fd_batch *batch) batch->in_fence_fd = -1; batch->fence = fd_fence_create(batch); - batch->cleared = batch->partial_cleared = 0; + batch->cleared = 0; batch->restore = batch->resolve = 0; batch->needs_flush = false; batch->flushed = false; @@ -79,10 +79,6 @@ batch_init(struct fd_batch *batch) fd_reset_wfi(batch); - /* reset maximal bounds: */ - batch->max_scissor.minx = batch->max_scissor.miny = ~0; - batch->max_scissor.maxx = batch->max_scissor.maxy = 0; - util_dynarray_init(&batch->draw_patches, NULL); if (is_a3xx(ctx->screen)) diff --git a/src/gallium/drivers/freedreno/freedreno_batch.h b/src/gallium/drivers/freedreno/freedreno_batch.h index 6bb88a62916..53050170cae 100644 --- a/src/gallium/drivers/freedreno/freedreno_batch.h +++ b/src/gallium/drivers/freedreno/freedreno_batch.h @@ -91,7 +91,7 @@ struct fd_batch { FD_BUFFER_DEPTH = PIPE_CLEAR_DEPTH, FD_BUFFER_STENCIL = PIPE_CLEAR_STENCIL, FD_BUFFER_ALL = FD_BUFFER_COLOR | FD_BUFFER_DEPTH | FD_BUFFER_STENCIL, - } cleared, partial_cleared, restore, resolve; + } cleared, restore, resolve; /* is this a non-draw batch (ie compute/blit which has no pfb state)? */ bool nondraw : 1; @@ -127,14 +127,6 @@ struct fd_batch { */ struct pipe_scissor_state max_scissor; - /* Track the cleared scissor for color/depth/stencil, so we know - * which, if any, tiles need to be restored (mem2gmem). Only valid - * if the corresponding bit in ctx->cleared is set. - */ - struct { - struct pipe_scissor_state color, depth, stencil; - } cleared_scissor; - /* Keep track of DRAW initiators that need to be patched up depending * on whether we using binning or not: */ diff --git a/src/gallium/drivers/freedreno/freedreno_draw.c b/src/gallium/drivers/freedreno/freedreno_draw.c index 0f382e61ca4..d5bb1e48bee 100644 --- a/src/gallium/drivers/freedreno/freedreno_draw.c +++ b/src/gallium/drivers/freedreno/freedreno_draw.c @@ -336,12 +336,6 @@ fd_blitter_clear(struct pipe_context *pctx, unsigned buffers, fd_blitter_pipe_end(ctx); } -/* TODO figure out how to make better use of existing state mechanism - * for clear (and possibly gmem->mem / mem->gmem) so we can (a) keep - * track of what state really actually changes, and (b) reduce the code - * in the a2xx/a3xx parts. - */ - static void fd_clear(struct pipe_context *pctx, unsigned buffers, const union pipe_color_union *color, double depth, unsigned stencil) @@ -349,7 +343,6 @@ fd_clear(struct pipe_context *pctx, unsigned buffers, struct fd_context *ctx = fd_context(pctx); struct fd_batch *batch = fd_context_batch(ctx); struct pipe_framebuffer_state *pfb = &batch->framebuffer; - struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx); unsigned cleared_buffers; int i; @@ -362,6 +355,14 @@ fd_clear(struct pipe_context *pctx, unsigned buffers, fd_context_all_dirty(ctx); } + /* pctx->clear() is only for full-surface clears, so scissor is + * equivalent to having GL_SCISSOR_TEST disabled: + */ + batch->max_scissor.minx = 0; + batch->max_scissor.miny = 0; + batch->max_scissor.maxx = pfb->width; + batch->max_scissor.maxy = pfb->height; + /* for bookkeeping about which buffers have been cleared (and thus * can fully or partially skip mem2gmem) we need to ignore buffers * that have already had a draw, in case apps do silly things like @@ -370,19 +371,8 @@ fd_clear(struct pipe_context *pctx, unsigned buffers, * the depth buffer, etc) */ cleared_buffers = buffers & (FD_BUFFER_ALL & ~batch->restore); + batch->cleared |= cleared_buffers; - /* do we have full-screen scissor? */ - if (!memcmp(scissor, &ctx->disabled_scissor, sizeof(*scissor))) { - batch->cleared |= cleared_buffers; - } else { - batch->partial_cleared |= cleared_buffers; - if (cleared_buffers & PIPE_CLEAR_COLOR) - batch->cleared_scissor.color = *scissor; - if (cleared_buffers & PIPE_CLEAR_DEPTH) - batch->cleared_scissor.depth = *scissor; - if (cleared_buffers & PIPE_CLEAR_STENCIL) - batch->cleared_scissor.stencil = *scissor; - } batch->resolve |= buffers; batch->needs_flush = true; diff --git a/src/gallium/drivers/freedreno/freedreno_gmem.c b/src/gallium/drivers/freedreno/freedreno_gmem.c index 981ab0cf763..92c719392c8 100644 --- a/src/gallium/drivers/freedreno/freedreno_gmem.c +++ b/src/gallium/drivers/freedreno/freedreno_gmem.c @@ -442,20 +442,6 @@ fd_gmem_render_tiles(struct fd_batch *batch) flush_ring(batch); } -/* tile needs restore if it isn't completely contained within the - * cleared scissor: - */ -static bool -skip_restore(struct pipe_scissor_state *scissor, struct fd_tile *tile) -{ - unsigned minx = tile->xoff; - unsigned maxx = tile->xoff + tile->bin_w; - unsigned miny = tile->yoff; - unsigned maxy = tile->yoff + tile->bin_h; - return (minx >= scissor->minx) && (maxx <= scissor->maxx) && - (miny >= scissor->miny) && (maxy <= scissor->maxy); -} - /* When deciding whether a tile needs mem2gmem, we need to take into * account the scissor rect(s) that were cleared. To simplify we only * consider the last scissor rect for each buffer, since the common @@ -468,21 +454,5 @@ fd_gmem_needs_restore(struct fd_batch *batch, struct fd_tile *tile, if (!(batch->restore & buffers)) return false; - /* if buffers partially cleared, then slow-path to figure out - * if this particular tile needs restoring: - */ - if ((buffers & FD_BUFFER_COLOR) && - (batch->partial_cleared & FD_BUFFER_COLOR) && - skip_restore(&batch->cleared_scissor.color, tile)) - return false; - if ((buffers & FD_BUFFER_DEPTH) && - (batch->partial_cleared & FD_BUFFER_DEPTH) && - skip_restore(&batch->cleared_scissor.depth, tile)) - return false; - if ((buffers & FD_BUFFER_STENCIL) && - (batch->partial_cleared & FD_BUFFER_STENCIL) && - skip_restore(&batch->cleared_scissor.stencil, tile)) - return false; - return true; } |