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authorChia-I Wu <[email protected]>2019-05-16 13:32:18 -0700
committerChia-I Wu <[email protected]>2019-06-07 22:47:07 +0000
commit2e21d66d7a0aadaaea8689276564e9633262d107 (patch)
tree345870f714e22b86f94c01cb33fa22d2b0394fd4
parent30314270d4695a8fd157e286014c5052f43135ae (diff)
virgl: add virgl_shader_binding_state
virgl_shader_binding_state will be used to manage all per-stage shader bindings. For now, it manages only sampler views. This replaces virgl_textures_info and fixes some issues - start_slot is now honored - views outside of [start_slot, slart_slot+count) are unmodified - views are released when the context is destroyed Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Alexandros Frantzis <[email protected]>
-rw-r--r--src/gallium/drivers/virgl/virgl_context.c74
-rw-r--r--src/gallium/drivers/virgl/virgl_context.h13
2 files changed, 44 insertions, 43 deletions
diff --git a/src/gallium/drivers/virgl/virgl_context.c b/src/gallium/drivers/virgl/virgl_context.c
index 3e6f0eae125..f02ed2d211d 100644
--- a/src/gallium/drivers/virgl/virgl_context.c
+++ b/src/gallium/drivers/virgl/virgl_context.c
@@ -91,17 +91,16 @@ static void virgl_attach_res_sampler_views(struct virgl_context *vctx,
enum pipe_shader_type shader_type)
{
struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
- struct virgl_textures_info *tinfo = &vctx->samplers[shader_type];
+ const struct virgl_shader_binding_state *binding =
+ &vctx->shader_bindings[shader_type];
+ uint32_t remaining_mask = binding->view_enabled_mask;
struct virgl_resource *res;
- uint32_t remaining_mask = tinfo->enabled_mask;
- unsigned i;
- while (remaining_mask) {
- i = u_bit_scan(&remaining_mask);
- assert(tinfo->views[i]);
- res = virgl_resource(tinfo->views[i]->base.texture);
- if (res)
- vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
+ while (remaining_mask) {
+ int i = u_bit_scan(&remaining_mask);
+ assert(binding->views[i] && binding->views[i]->texture);
+ res = virgl_resource(binding->views[i]->texture);
+ vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
}
}
@@ -809,39 +808,22 @@ static void virgl_set_sampler_views(struct pipe_context *ctx,
struct pipe_sampler_view **views)
{
struct virgl_context *vctx = virgl_context(ctx);
- int i;
- uint32_t disable_mask = ~((1ull << num_views) - 1);
- struct virgl_textures_info *tinfo = &vctx->samplers[shader_type];
- uint32_t new_mask = 0;
- uint32_t remaining_mask;
-
- remaining_mask = tinfo->enabled_mask & disable_mask;
-
- while (remaining_mask) {
- i = u_bit_scan(&remaining_mask);
- assert(tinfo->views[i]);
-
- pipe_sampler_view_reference((struct pipe_sampler_view **)&tinfo->views[i], NULL);
- }
+ struct virgl_shader_binding_state *binding =
+ &vctx->shader_bindings[shader_type];
- for (i = 0; i < num_views; i++) {
- struct virgl_sampler_view *grview = virgl_sampler_view(views[i]);
-
- if (views[i] == (struct pipe_sampler_view *)tinfo->views[i])
- continue;
-
- if (grview) {
- new_mask |= 1 << i;
- pipe_sampler_view_reference((struct pipe_sampler_view **)&tinfo->views[i], views[i]);
+ binding->view_enabled_mask &= ~u_bit_consecutive(start_slot, num_views);
+ for (unsigned i = 0; i < num_views; i++) {
+ unsigned idx = start_slot + i;
+ if (views && views[i]) {
+ pipe_sampler_view_reference(&binding->views[idx], views[i]);
+ binding->view_enabled_mask |= 1 << idx;
} else {
- pipe_sampler_view_reference((struct pipe_sampler_view **)&tinfo->views[i], NULL);
- disable_mask |= 1 << i;
+ pipe_sampler_view_reference(&binding->views[idx], NULL);
}
}
- tinfo->enabled_mask &= ~disable_mask;
- tinfo->enabled_mask |= new_mask;
- virgl_encode_set_sampler_views(vctx, shader_type, start_slot, num_views, tinfo->views);
+ virgl_encode_set_sampler_views(vctx, shader_type,
+ start_slot, num_views, (struct virgl_sampler_view **)binding->views);
virgl_attach_res_sampler_views(vctx, shader_type);
}
@@ -1163,16 +1145,34 @@ static void virgl_launch_grid(struct pipe_context *ctx,
}
static void
+virgl_release_shader_binding(struct virgl_context *vctx,
+ enum pipe_shader_type shader_type)
+{
+ struct virgl_shader_binding_state *binding =
+ &vctx->shader_bindings[shader_type];
+
+ while (binding->view_enabled_mask) {
+ int i = u_bit_scan(&binding->view_enabled_mask);
+ pipe_sampler_view_reference(
+ (struct pipe_sampler_view **)&binding->views[i], NULL);
+ }
+}
+
+static void
virgl_context_destroy( struct pipe_context *ctx )
{
struct virgl_context *vctx = virgl_context(ctx);
struct virgl_screen *rs = virgl_screen(ctx->screen);
+ enum pipe_shader_type shader_type;
vctx->framebuffer.zsbuf = NULL;
vctx->framebuffer.nr_cbufs = 0;
virgl_encoder_destroy_sub_ctx(vctx, vctx->hw_sub_ctx_id);
virgl_flush_eq(vctx, vctx, NULL);
+ for (shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++)
+ virgl_release_shader_binding(vctx, shader_type);
+
rs->vws->cmd_buf_destroy(vctx->cbuf);
if (vctx->uploader)
u_upload_destroy(vctx->uploader);
diff --git a/src/gallium/drivers/virgl/virgl_context.h b/src/gallium/drivers/virgl/virgl_context.h
index 38a39311215..ad8ba5f98f0 100644
--- a/src/gallium/drivers/virgl/virgl_context.h
+++ b/src/gallium/drivers/virgl/virgl_context.h
@@ -46,22 +46,23 @@ struct virgl_so_target {
uint32_t handle;
};
-struct virgl_textures_info {
- struct virgl_sampler_view *views[16];
- uint32_t enabled_mask;
-};
-
struct virgl_rasterizer_state {
struct pipe_rasterizer_state rs;
uint32_t handle;
};
+struct virgl_shader_binding_state {
+ struct pipe_sampler_view *views[16];
+ uint32_t view_enabled_mask;
+};
+
struct virgl_context {
struct pipe_context base;
struct virgl_cmd_buf *cbuf;
unsigned cbuf_initial_cdw;
- struct virgl_textures_info samplers[PIPE_SHADER_TYPES];
+ struct virgl_shader_binding_state shader_bindings[PIPE_SHADER_TYPES];
+
struct virgl_vertex_elements_state *vertex_elements;
struct pipe_framebuffer_state framebuffer;