diff options
| author | Samuel Pitoiset <[email protected]> | 2019-06-25 08:29:24 +0200 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2019-07-07 17:03:38 +0200 |
| commit | 1f82007a9e0e875b23b273e967707aa27a068fbf (patch) | |
| tree | e75d4e59f8bb42b1972a4ad95b2106402a8ee126 | |
| parent | c3459968cd889143929c875a225757d106642769 (diff) | |
radv/gfx10: set MAX_ALLOC_COUNT
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 52cb7477c08..57e143ece46 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -321,6 +321,7 @@ si_emit_graphics(struct radv_physical_device *physical_device, if (physical_device->rad_info.chip_class >= GFX9) { unsigned num_se = physical_device->rad_info.max_se; unsigned pc_lines = 0; + unsigned max_alloc_count = 0; switch (physical_device->rad_info.family) { case CHIP_VEGA10: @@ -330,14 +331,25 @@ si_emit_graphics(struct radv_physical_device *physical_device, break; case CHIP_RAVEN: case CHIP_RAVEN2: + case CHIP_NAVI10: + case CHIP_NAVI12: pc_lines = 1024; break; + case CHIP_NAVI14: + pc_lines = 512; + break; default: assert(0); } + if (physical_device->rad_info.chip_class >= GFX10) { + max_alloc_count = pc_lines / 3; + } else { + max_alloc_count = MIN2(128, pc_lines / (4 * num_se)); + } + radeon_set_context_reg(cs, R_028C48_PA_SC_BINNER_CNTL_1, - S_028C48_MAX_ALLOC_COUNT(MIN2(128, pc_lines / (4 * num_se))) | + S_028C48_MAX_ALLOC_COUNT(max_alloc_count) | S_028C48_MAX_PRIM_PER_BATCH(1023)); radeon_set_context_reg(cs, R_028C4C_PA_SC_CONSERVATIVE_RASTERIZATION_CNTL, S_028C4C_NULL_SQUAD_AA_MASK_ENABLE(1)); |