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authorNicolai Hähnle <[email protected]>2018-08-30 17:06:52 +0200
committerMarek Olšák <[email protected]>2019-07-03 15:51:13 -0400
commit0bf3e6fae7f82b4f16fbcbb05a1ae47f7930e189 (patch)
treebcb34542d4b60e8b1016d59a37021eb737e1a8a3
parent2afd3c421d369630580912b60f564a3b4d2a4464 (diff)
radeonsi/gfx10: double the number of tessellation offchip buffers per SE
Each gfx10 shader engine corresponds to two gfx9 shader engines, so scale the number of offchip buffers accordingly. Acked-by: Bas Nieuwenhuizen <[email protected]>
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 7eaa400849e..c2cee024982 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1031,9 +1031,11 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
*/
unsigned max_offchip_buffers_per_se;
+ if (sscreen->info.chip_class >= GFX10)
+ max_offchip_buffers_per_se = 256;
/* Only certain chips can use the maximum value. */
- if (sscreen->info.family == CHIP_VEGA12 ||
- sscreen->info.family == CHIP_VEGA20)
+ else if (sscreen->info.family == CHIP_VEGA12 ||
+ sscreen->info.family == CHIP_VEGA20)
max_offchip_buffers_per_se = double_offchip_buffers ? 128 : 64;
else
max_offchip_buffers_per_se = double_offchip_buffers ? 127 : 63;