diff options
| author | Dave Airlie <[email protected]> | 2017-07-24 17:09:47 +1000 |
|---|---|---|
| committer | Emil Velikov <[email protected]> | 2017-08-03 00:19:07 +0100 |
| commit | 3b6096d560c5b51878c329e9ac8fc742ee6fcf2c (patch) | |
| tree | a25c0d64515247d36df43aca819dbf826ca99f72 | |
| parent | 270e7476c89329925384942e35e8576333d45271 (diff) | |
radv: fix non-0 based layer clears.
If the layer base was > 0, it wasn't getting passed as the start
instance or getting added in the shaders.
Fixes CTS dEQP-VK.api.image_clearing.core.clear_color_attachment.2d_r8_uint_multiple_layers
Fixes: 7e0382fb (radv: add support for layered clears (v2))
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
(cherry picked from commit 75392e76adf143070a5f208febd8da31b39b7676)
| -rw-r--r-- | src/amd/vulkan/radv_meta_clear.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index a5502ce53f2..d06cf4eeb8d 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -105,8 +105,10 @@ build_color_shaders(struct nir_shader **out_vs, vs_out_layer->data.location = VARYING_SLOT_LAYER; vs_out_layer->data.interpolation = INTERP_MODE_FLAT; nir_ssa_def *inst_id = nir_load_system_value(&vs_b, nir_intrinsic_load_instance_id, 0); + nir_ssa_def *base_instance = nir_load_system_value(&vs_b, nir_intrinsic_load_base_instance, 0); - nir_store_var(&vs_b, vs_out_layer, inst_id, 0x1); + nir_ssa_def *layer_id = nir_iadd(&vs_b, inst_id, base_instance); + nir_store_var(&vs_b, vs_out_layer, layer_id, 0x1); *out_vs = vs_b.shader; *out_fs = fs_b.shader; @@ -470,7 +472,7 @@ emit_color_clear(struct radv_cmd_buffer *cmd_buffer, radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &clear_rect->rect); - radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, 0); + radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, clear_rect->baseArrayLayer); radv_cmd_buffer_set_subpass(cmd_buffer, subpass, false); } @@ -507,7 +509,10 @@ build_depthstencil_shader(struct nir_shader **out_vs, struct nir_shader **out_fs vs_out_layer->data.location = VARYING_SLOT_LAYER; vs_out_layer->data.interpolation = INTERP_MODE_FLAT; nir_ssa_def *inst_id = nir_load_system_value(&vs_b, nir_intrinsic_load_instance_id, 0); - nir_store_var(&vs_b, vs_out_layer, inst_id, 0x1); + nir_ssa_def *base_instance = nir_load_system_value(&vs_b, nir_intrinsic_load_base_instance, 0); + + nir_ssa_def *layer_id = nir_iadd(&vs_b, inst_id, base_instance); + nir_store_var(&vs_b, vs_out_layer, layer_id, 0x1); *out_vs = vs_b.shader; *out_fs = fs_b.shader; @@ -763,7 +768,7 @@ emit_depthstencil_clear(struct radv_cmd_buffer *cmd_buffer, radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &clear_rect->rect); - radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, 0); + radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, clear_rect->baseArrayLayer); } |