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authorKristian Høgsberg <[email protected]>2008-01-22 12:13:16 -0500
committerKristian Høgsberg <[email protected]>2008-01-22 12:14:59 -0500
commit46eb02b60920a920b782bacb15f01b44e18f888d (patch)
treef84961ea7cd2ee11f89ae014aab96092f406c692
parent5c82549d9e3151aae4f66f2a26b6055475f6f538 (diff)
[intel] Clean up references to screen buffer metrics.
The screen wide info such as pitch and cpp are obsoleted by the FBO changes, so clean up the last few references to those, except for setting up the legacy screen regions.
-rw-r--r--src/mesa/drivers/dri/i915/i830_state.c32
-rw-r--r--src/mesa/drivers/dri/i915/i915_state.c43
-rw-r--r--src/mesa/drivers/dri/intel/intel_regions.c6
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.c26
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.h7
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_copy.c2
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_format.c2
7 files changed, 13 insertions, 105 deletions
diff --git a/src/mesa/drivers/dri/i915/i830_state.c b/src/mesa/drivers/dri/i915/i830_state.c
index 3c149e69055..e44a7dfca1f 100644
--- a/src/mesa/drivers/dri/i915/i830_state.c
+++ b/src/mesa/drivers/dri/i915/i830_state.c
@@ -760,7 +760,7 @@ i830Enable(GLcontext * ctx, GLenum cap, GLboolean state)
/* Logicop doesn't seem to work at 16bpp:
*/
- if (i830->intel.intelScreen->cpp == 2)
+ if (i830->intel.ctx.Visual.rgbBits == 16)
FALLBACK(&i830->intel, I830_FALLBACK_LOGICOP, state);
break;
@@ -879,8 +879,6 @@ i830Enable(GLcontext * ctx, GLenum cap, GLboolean state)
static void
i830_init_packets(struct i830_context *i830)
{
- intelScreenPrivate *screen = i830->intel.intelScreen;
-
/* Zero all state */
memset(&i830->state, 0, sizeof(i830->state));
@@ -1033,35 +1031,7 @@ i830_init_packets(struct i830_context *i830)
i830->state.Stipple[I830_STPREG_ST0] = _3DSTATE_STIPPLE;
- i830->state.Buffer[I830_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
- i830->state.Buffer[I830_DESTREG_CBUFADDR1] = (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(screen->front.pitch) | /* pitch in bytes */
- BUF_3D_USE_FENCE);
-
-
- i830->state.Buffer[I830_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
- i830->state.Buffer[I830_DESTREG_DBUFADDR1] = (BUF_3D_ID_DEPTH | BUF_3D_PITCH(screen->depth.pitch) | /* pitch in bytes */
- BUF_3D_USE_FENCE);
-
i830->state.Buffer[I830_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
-
-#if 0
- switch (screen->fbFormat) {
- case DV_PF_565:
- i830->state.Buffer[I830_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
- DSTORG_VERT_BIAS(0x8) | /* .5 */
- screen->fbFormat |
- DEPTH_IS_Z |
- DEPTH_FRMT_16_FIXED);
- break;
- case DV_PF_8888:
- i830->state.Buffer[I830_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
- DSTORG_VERT_BIAS(0x8) | /* .5 */
- screen->fbFormat |
- DEPTH_IS_Z |
- DEPTH_FRMT_24_FIXED_8_OTHER);
- break;
- }
-#endif
i830->state.Buffer[I830_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
DISABLE_SCISSOR_RECT);
i830->state.Buffer[I830_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
diff --git a/src/mesa/drivers/dri/i915/i915_state.c b/src/mesa/drivers/dri/i915/i915_state.c
index 21d2fe6289f..c814f8d532e 100644
--- a/src/mesa/drivers/dri/i915/i915_state.c
+++ b/src/mesa/drivers/dri/i915/i915_state.c
@@ -742,7 +742,7 @@ i915Enable(GLcontext * ctx, GLenum cap, GLboolean state)
/* Logicop doesn't seem to work at 16bpp:
*/
- if (i915->intel.intelScreen->cpp == 2) /* XXX FBO fix */
+ if (ctx->Visual.rgbBits == 16)
FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
break;
@@ -845,8 +845,6 @@ i915Enable(GLcontext * ctx, GLenum cap, GLboolean state)
static void
i915_init_packets(struct i915_context *i915)
{
- intelScreenPrivate *screen = i915->intel.intelScreen;
-
/* Zero all state */
memset(&i915->state, 0, sizeof(i915->state));
@@ -864,7 +862,7 @@ i915_init_packets(struct i915_context *i915)
i915->state.Ctx[I915_CTXREG_LIS4] = 0;
i915->state.Ctx[I915_CTXREG_LIS5] = 0;
- if (screen->cpp == 2) /* XXX FBO fix */
+ if (i915->intel.ctx.Visual.rgbBits == 16)
i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
@@ -907,46 +905,9 @@ i915_init_packets(struct i915_context *i915)
i915->state.Fog[I915_FOGREG_COLOR] = _3DSTATE_FOG_COLOR_CMD;
}
-
{
- I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
- /* color buffer offset/stride */
- i915->state.Buffer[I915_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
- /* XXX FBO: remove this? Also get set in i915_set_draw_region() */
- i915->state.Buffer[I915_DESTREG_CBUFADDR1] = (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(screen->front.pitch) | /* pitch in bytes */
- BUF_3D_USE_FENCE);
-
- i915->state.Buffer[I915_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
- /* XXX FBO: remove this? Also get set in i915_set_draw_region() */
- i915->state.Buffer[I915_DESTREG_DBUFADDR1] = (BUF_3D_ID_DEPTH | BUF_3D_PITCH(screen->depth.pitch) | /* pitch in bytes */
- BUF_3D_USE_FENCE);
-
i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
- /* XXX FBO: remove this? Also get set in i915_set_draw_region() */
-#if 0 /* seems we don't need this */
- switch (screen->fbFormat) {
- case DV_PF_565:
- i915->state.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
- DSTORG_VERT_BIAS(0x8) | /* .5 */
- LOD_PRECLAMP_OGL |
- TEX_DEFAULT_COLOR_OGL |
- DITHER_FULL_ALWAYS |
- screen->fbFormat |
- DEPTH_FRMT_16_FIXED);
- break;
- case DV_PF_8888:
- i915->state.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */
- DSTORG_VERT_BIAS(0x8) | /* .5 */
- LOD_PRECLAMP_OGL |
- TEX_DEFAULT_COLOR_OGL |
- screen->fbFormat |
- DEPTH_FRMT_24_FIXED_8_OTHER);
- break;
- }
-#endif
-
-
/* scissor */
i915->state.Buffer[I915_DESTREG_SENABLE] =
(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index a5de01a3a84..6e127dc31e7 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -394,8 +394,8 @@ intel_recreate_static(struct intel_context *intel,
region->refcount = 1;
}
- region->cpp = intelScreen->cpp;
- region->pitch = region_desc->pitch / intelScreen->cpp;
+ region->cpp = intel->ctx.Visual.rgbBits / 8;
+ region->pitch = intelScreen->pitch;
region->height = intelScreen->height; /* needed? */
region->tiled = region_desc->tiled;
@@ -408,7 +408,7 @@ intel_recreate_static(struct intel_context *intel,
region->buffer = dri_bo_alloc_static(intel->bufmgr,
name,
region_desc->offset,
- region_desc->pitch *
+ intelScreen->pitch *
intelScreen->height,
region_desc->map,
DRM_BO_FLAG_MEM_TT);
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 504bc918eb8..247fc4c5bc9 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -194,13 +194,13 @@ intelPrintDRIInfo(intelScreenPrivate * intelScreen,
{
fprintf(stderr, "*** Front size: 0x%x offset: 0x%x pitch: %d\n",
intelScreen->front.size, intelScreen->front.offset,
- intelScreen->front.pitch);
+ intelScreen->pitch);
fprintf(stderr, "*** Back size: 0x%x offset: 0x%x pitch: %d\n",
intelScreen->back.size, intelScreen->back.offset,
- intelScreen->back.pitch);
+ intelScreen->pitch);
fprintf(stderr, "*** Depth size: 0x%x offset: 0x%x pitch: %d\n",
intelScreen->depth.size, intelScreen->depth.offset,
- intelScreen->depth.pitch);
+ intelScreen->pitch);
fprintf(stderr, "*** Texture size: 0x%x offset: 0x%x\n",
intelScreen->tex.size, intelScreen->tex.offset);
fprintf(stderr, "*** Memory : 0x%x\n", gDRIPriv->mem);
@@ -239,29 +239,26 @@ intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen,
{
intelScreen->width = sarea->width;
intelScreen->height = sarea->height;
+ intelScreen->pitch = sarea->pitch;
intelScreen->front.offset = sarea->front_offset;
- intelScreen->front.pitch = sarea->pitch * intelScreen->cpp;
intelScreen->front.handle = sarea->front_handle;
intelScreen->front.size = sarea->front_size;
intelScreen->front.tiled = sarea->front_tiled;
intelScreen->back.offset = sarea->back_offset;
- intelScreen->back.pitch = sarea->pitch * intelScreen->cpp;
intelScreen->back.handle = sarea->back_handle;
intelScreen->back.size = sarea->back_size;
intelScreen->back.tiled = sarea->back_tiled;
if (intelScreen->driScrnPriv->ddx_version.minor >= 8) {
intelScreen->third.offset = sarea->third_offset;
- intelScreen->third.pitch = sarea->pitch * intelScreen->cpp;
intelScreen->third.handle = sarea->third_handle;
intelScreen->third.size = sarea->third_size;
intelScreen->third.tiled = sarea->third_tiled;
}
intelScreen->depth.offset = sarea->depth_offset;
- intelScreen->depth.pitch = sarea->pitch * intelScreen->cpp;
intelScreen->depth.handle = sarea->depth_handle;
intelScreen->depth.size = sarea->depth_size;
intelScreen->depth.tiled = sarea->depth_tiled;
@@ -350,21 +347,6 @@ static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv)
intelScreen->deviceID = gDRIPriv->deviceID;
- intelScreen->mem = gDRIPriv->mem;
- intelScreen->cpp = gDRIPriv->cpp;
-
- switch (gDRIPriv->bitsPerPixel) {
- case 16:
- intelScreen->fbFormat = DV_PF_565;
- break;
- case 32:
- intelScreen->fbFormat = DV_PF_8888;
- break;
- default:
- exit(1);
- break;
- }
-
intelUpdateScreenFromSAREA(intelScreen, sarea);
if (!intelMapScreenRegions(sPriv)) {
diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h
index c1bf5bf8d38..b1ca500008b 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.h
+++ b/src/mesa/drivers/dri/intel/intel_screen.h
@@ -42,7 +42,6 @@ typedef struct
drmSize size; /* region size in bytes */
char *map; /* memory map */
int offset; /* from start of video mem, in bytes */
- int pitch; /* row stride, in bytes */
unsigned int bo_handle; /* buffer object id if available, or -1 */
/**
* Flags if the region is tiled.
@@ -63,11 +62,7 @@ typedef struct
int deviceID;
int width;
int height;
- int mem; /* unused */
-
- int cpp; /* for front and back buffers */
-/* int bitsPerPixel; */
- int fbFormat; /* XXX FBO: this is obsolete - remove after i830 updates */
+ int pitch; /* common row stride, in pixels */
int logTextureGranularity;
diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c
index 521ce06640f..7facc469f48 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c
@@ -75,7 +75,7 @@ get_teximage_source(struct intel_context *intel, GLenum internalFormat)
case GL_RGBA8:
return intel_readbuf_region(intel);
case GL_RGB:
- if (intel->intelScreen->cpp == 2)
+ if (intel->ctx.Visual.rgbBits == 16)
return intel_readbuf_region(intel);
return NULL;
default:
diff --git a/src/mesa/drivers/dri/intel/intel_tex_format.c b/src/mesa/drivers/dri/intel/intel_tex_format.c
index 51ea1e69cb5..349a29bd714 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_format.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_format.c
@@ -16,7 +16,7 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat,
GLenum format, GLenum type)
{
struct intel_context *intel = intel_context(ctx);
- const GLboolean do32bpt = (intel->intelScreen->cpp == 4);
+ const GLboolean do32bpt = (intel->ctx.Visual.rgbBits == 32);
switch (internalFormat) {
case 4: