diff options
| author | Samuel Pitoiset <[email protected]> | 2017-12-06 17:49:36 +0100 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2017-12-08 11:22:00 +0100 |
| commit | d90b7a4c5073751221abff309a8de0705a625acc (patch) | |
| tree | fdc8f6afd67ff2370ab3d1f1851d710e41290315 | |
| parent | c7c7b0088998a82a6f06f1a5d2546150ea6f4ffb (diff) | |
radv: remove useless checks in radv_set_{color,depth}_clear_regs()
Already checked by the respective callers.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
| -rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 95c2915c977..621f0bad0b1 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1300,8 +1300,7 @@ radv_set_depth_clear_regs(struct radv_cmd_buffer *cmd_buffer, va += image->offset + image->clear_value_offset; unsigned reg_offset = 0, reg_count = 0; - if (!image->surface.htile_size) - return; + assert(image->surface.htile_size); if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) { ++reg_count; @@ -1400,8 +1399,7 @@ radv_set_color_clear_regs(struct radv_cmd_buffer *cmd_buffer, uint64_t va = radv_buffer_get_va(image->bo); va += image->offset + image->clear_value_offset; - if (!image->cmask.size && !image->surface.dcc_size) - return; + assert(image->cmask.size || image->surface.dcc_size); radeon_emit(cmd_buffer->cs, PKT3(PKT3_WRITE_DATA, 4, 0)); radeon_emit(cmd_buffer->cs, S_370_DST_SEL(V_370_MEM_ASYNC) | |