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authorChris Forbes <chrisf@ijw.co.nz>2014-04-13 12:37:32 +1200
committerChris Forbes <chrisf@ijw.co.nz>2014-04-21 10:13:07 +1200
commitd63026f62ac0d9c4674a93d12843ea96e77b3c5e (patch)
tree5314f7f143d26cf2f903e76144d6f646b12e59ed
parentc4a98e76d7dcb84ba6a0337dc975351966c4dac7 (diff)
i965: Use ctx->Texture._MaxEnabledTexImageUnit for upper bound
Avoid looping over 32/48/96 (!!) tex image units every draw, most of which we don't care about. Improves performance on everyone's favorite not-a-benchmark by 2.9% on Haswell. Signed-off-by: Chris Forbes <chrisf@ijw.co.nz> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.c3
-rw-r--r--src/mesa/drivers/dri/i965/brw_tex.c3
2 files changed, 4 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 583c7d66b20..34afc26ccbd 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -315,7 +315,8 @@ brw_predraw_resolve_buffers(struct brw_context *brw)
intel_renderbuffer_resolve_hiz(brw, depth_irb);
/* Resolve depth buffer and render cache of each enabled texture. */
- for (int i = 0; i < ctx->Const.MaxCombinedTextureImageUnits; i++) {
+ int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
+ for (int i = 0; i <= maxEnabledUnit; i++) {
if (!ctx->Texture.Unit[i]._ReallyEnabled)
continue;
tex_obj = intel_texture_object(ctx->Texture.Unit[i]._Current);
diff --git a/src/mesa/drivers/dri/i965/brw_tex.c b/src/mesa/drivers/dri/i965/brw_tex.c
index b1f4de07149..305d83d09da 100644
--- a/src/mesa/drivers/dri/i965/brw_tex.c
+++ b/src/mesa/drivers/dri/i965/brw_tex.c
@@ -46,8 +46,9 @@ void brw_validate_textures( struct brw_context *brw )
{
struct gl_context *ctx = &brw->ctx;
int i;
+ int maxEnabledUnit = ctx->Texture._MaxEnabledTexImageUnit;
- for (i = 0; i < ctx->Const.MaxCombinedTextureImageUnits; i++) {
+ for (i = 0; i <= maxEnabledUnit; i++) {
struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i];
if (texUnit->_ReallyEnabled) {