diff options
author | Dave Airlie <[email protected]> | 2017-07-06 02:56:21 +0100 |
---|---|---|
committer | Dave Airlie <[email protected]> | 2017-07-06 23:05:59 +0100 |
commit | 9d9f0513905af4c916bb01253b324218fccb4272 (patch) | |
tree | 9e84c9197535baf2cc99c2566c96feecc4388350 | |
parent | 076faf8764d3cd8038145286f7533d0a18e82476 (diff) |
ac/radv: change api to create target machine
This just modifies the API to make it easier to add other flags
to target machine creation.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
-rw-r--r-- | src/amd/common/ac_llvm_util.c | 4 | ||||
-rw-r--r-- | src/amd/common/ac_llvm_util.h | 5 | ||||
-rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 12 |
3 files changed, 14 insertions, 7 deletions
diff --git a/src/amd/common/ac_llvm_util.c b/src/amd/common/ac_llvm_util.c index d9d8d9124f5..088f01f7ad6 100644 --- a/src/amd/common/ac_llvm_util.c +++ b/src/amd/common/ac_llvm_util.c @@ -118,11 +118,11 @@ static const char *ac_get_llvm_processor_name(enum radeon_family family) } } -LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family, bool supports_spill) +LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family, enum ac_target_machine_options tm_options) { assert(family >= CHIP_TAHITI); - const char *triple = supports_spill ? "amdgcn-mesa-mesa3d" : "amdgcn--"; + const char *triple = (tm_options & AC_TM_SUPPORTS_SPILL) ? "amdgcn-mesa-mesa3d" : "amdgcn--"; LLVMTargetRef target = ac_get_llvm_target(triple); LLVMTargetMachineRef tm = LLVMCreateTargetMachine( target, diff --git a/src/amd/common/ac_llvm_util.h b/src/amd/common/ac_llvm_util.h index 4ce59ec8701..06208a41ce8 100644 --- a/src/amd/common/ac_llvm_util.h +++ b/src/amd/common/ac_llvm_util.h @@ -54,7 +54,10 @@ enum ac_func_attr { AC_FUNC_ATTR_LEGACY = (1u << 31), }; -LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family, bool supports_spill); +enum ac_target_machine_options { + AC_TM_SUPPORTS_SPILL = (1 << 0), +}; +LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family, enum ac_target_machine_options tm_options); void ac_add_attr_dereferenceable(LLVMValueRef val, uint64_t bytes); bool ac_is_sgpr_param(LLVMValueRef param); diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 061121b8245..71a5cce4e9c 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -460,12 +460,14 @@ static struct radv_shader_variant *radv_shader_variant_create(struct radv_device options.key = *key; struct ac_shader_binary binary; - + enum ac_target_machine_options tm_options = 0; options.unsafe_math = !!(device->debug_flags & RADV_DEBUG_UNSAFE_MATH); options.family = chip_family; options.chip_class = device->physical_device->rad_info.chip_class; options.supports_spill = device->llvm_supports_spill; - tm = ac_create_target_machine(chip_family, options.supports_spill); + if (options.supports_spill) + tm_options |= AC_TM_SUPPORTS_SPILL; + tm = ac_create_target_machine(chip_family, tm_options); ac_compile_nir_shader(tm, &binary, &variant->config, &variant->info, shader, &options, dump); LLVMDisposeTargetMachine(tm); @@ -501,10 +503,12 @@ radv_pipeline_create_gs_copy_shader(struct radv_pipeline *pipeline, struct ac_nir_compiler_options options = {0}; struct ac_shader_binary binary; + enum ac_target_machine_options tm_options = 0; options.family = chip_family; options.chip_class = pipeline->device->physical_device->rad_info.chip_class; - options.supports_spill = pipeline->device->llvm_supports_spill; - tm = ac_create_target_machine(chip_family, options.supports_spill); + if (options.supports_spill) + tm_options |= AC_TM_SUPPORTS_SPILL; + tm = ac_create_target_machine(chip_family, tm_options); ac_create_gs_copy_shader(tm, nir, &binary, &variant->config, &variant->info, &options, dump_shader); LLVMDisposeTargetMachine(tm); |