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authorMichel Dänzer <michel.daenzer@amd.com>2014-08-26 18:21:50 +0900
committerMichel Dänzer <michel@daenzer.net>2014-10-09 18:11:44 +0900
commit7b4276d7acf2e0f77044cb50caa6ad936fa78786 (patch)
tree8bc05cdacfcd2ac799ddbe8c5e5a45619aaf3c3f
parent5a1352289862a9bd695a15009c69cad54727c66b (diff)
r600g,radeonsi: Always use GTT again for PIPE_USAGE_STREAM buffers
Putting those in VRAM can cause long pauses due to buffers being moved into / out of VRAM. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84662 Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--src/gallium/drivers/radeon/r600_buffer_common.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
index 227a221bb7e..b7306d7bf34 100644
--- a/src/gallium/drivers/radeon/r600_buffer_common.c
+++ b/src/gallium/drivers/radeon/r600_buffer_common.c
@@ -110,11 +110,13 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
enum radeon_bo_flag flags = 0;
switch (res->b.b.usage) {
+ case PIPE_USAGE_STREAM:
+ flags = RADEON_FLAG_GTT_WC;
+ /* fall through */
case PIPE_USAGE_STAGING:
/* Transfers are likely to occur more often with these resources. */
res->domains = RADEON_DOMAIN_GTT;
break;
- case PIPE_USAGE_STREAM:
case PIPE_USAGE_DYNAMIC:
/* Older kernels didn't always flush the HDP cache before
* CS execution