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authorLucas Stach <l.stach@pengutronix.de>2016-11-21 12:29:04 +0100
committerLucas Stach <l.stach@pengutronix.de>2017-04-11 16:52:27 +0200
commit797890bbbd3b4d5415005af782244b255cb9c488 (patch)
tree01bf930951078a26725ed4481fe9254e48be4bf2
parent52f6c8cc31f553ba2005892fcf2ca9b5f10bac91 (diff)
etnaviv: enable TS also on sampler resources
Fixes a performance issue with imported winsys buffers as those are marked with binding sampler view. This might require a TS flush on single pipe chips that directly sample from the rendered buffer, but otherwise seems to work fine. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
-rw-r--r--src/gallium/drivers/etnaviv/etnaviv_surface.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/gallium/drivers/etnaviv/etnaviv_surface.c b/src/gallium/drivers/etnaviv/etnaviv_surface.c
index db4846aa060..7ac2862e12d 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_surface.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_surface.c
@@ -64,12 +64,9 @@ etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc,
* indicate the tile status module bypasses the memory
* offset and MMU. */
- /* XXX for now, don't do TS for render textures as this path
- * is not stable. */
if (VIV_FEATURE(ctx->screen, chipFeatures, FAST_CLEAR) &&
VIV_FEATURE(ctx->screen, chipMinorFeatures0, MC20) &&
!DBG_ENABLED(ETNA_DBG_NO_TS) && !rsc->ts_bo &&
- !(rsc->base.bind & (PIPE_BIND_SAMPLER_VIEW)) &&
(rsc->levels[level].padded_width & ETNA_RS_WIDTH_MASK) == 0 &&
(rsc->levels[level].padded_height & ETNA_RS_HEIGHT_MASK) == 0) {
etna_screen_resource_alloc_ts(pctx->screen, rsc);