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authorEduardo Lima Mitev <[email protected]>2015-06-16 21:31:49 +0200
committerJason Ekstrand <[email protected]>2015-08-03 09:40:47 -0700
commit662c4c99065381b8e265310d176cfdef6698ca57 (patch)
tree51a4900a84d62a48b7866f14d439c79ac915054c
parent11ed02e1c81a2aa71b22b1d6847f58e41fd89271 (diff)
i965/nir/vec4: Implement store_output intrinsic
This implementation is based on the current URB setup in vec4_visitor, which requires the output register to be stored in the output_reg array at variable's original shader location index. But since nir_lower_io() pass uses the value in var->data.driver_location, we need to put there var->data.location instead, prior to calling nir_lower_io(), so that we end up with the correct index in const_index[0]. The driver_location is not used at all, so this patch also disables the nir_assign_var_locations pass on non-scalar shaders. Reviewed-by: Jason Ekstrand <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_nir.c5
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_nir.cpp17
2 files changed, 19 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c
index b241121dac7..4f7335024a4 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -106,13 +106,16 @@ brw_create_nir(struct brw_context *brw,
&nir->num_direct_uniforms,
&nir->num_uniforms,
is_scalar);
+ nir_assign_var_locations(&nir->outputs, &nir->num_outputs, is_scalar);
} else {
nir_assign_var_locations(&nir->uniforms,
&nir->num_uniforms,
is_scalar);
+
+ foreach_list_typed(nir_variable, var, node, &nir->outputs)
+ var->data.driver_location = var->data.location;
}
nir_assign_var_locations(&nir->inputs, &nir->num_inputs, is_scalar);
- nir_assign_var_locations(&nir->outputs, &nir->num_outputs, is_scalar);
nir_lower_io(nir, is_scalar);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 5bf1dbb7881..696122d725e 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -473,10 +473,23 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
}
case nir_intrinsic_store_output_indirect:
+ has_indirect = true;
/* fallthrough */
- case nir_intrinsic_store_output:
- /* @TODO: Not yet implemented */
+ case nir_intrinsic_store_output: {
+ int varying = instr->const_index[0];
+
+ src = get_nir_src(instr->src[0], BRW_REGISTER_TYPE_F,
+ instr->num_components);
+ dest = dst_reg(src);
+
+ if (has_indirect) {
+ dest.reladdr = new(mem_ctx) src_reg(get_nir_src(instr->src[1],
+ BRW_REGISTER_TYPE_D,
+ 1));
+ }
+ output_reg[varying] = dest;
break;
+ }
case nir_intrinsic_load_vertex_id:
unreachable("should be lowered by lower_vertex_id()");