diff options
| author | Wladimir J. van der Laan <[email protected]> | 2017-11-23 10:08:34 +0100 |
|---|---|---|
| committer | Christian Gmeiner <[email protected]> | 2017-11-23 22:24:51 +0100 |
| commit | 35548cae93513875dcad9cc88589add5fac7d836 (patch) | |
| tree | 48d010da2ba495219dcff8d502996fd1ec91f945 | |
| parent | 99aea1e3ded03d7a51459efd085842ffedff590b (diff) | |
etnaviv: Emit vertex buffers consecutively
Vertex buffer legacy state is no longer picked up with new drawing
commands. Change to use different cases depending on the number of
vertex streams in the GPU specs.
This results in slightly more compact state emission as well, on all
vivantes.
Signed-off-by: Wladimir J. van der Laan <[email protected]>
Reviewed-by: Lucas Stach <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
| -rw-r--r-- | src/gallium/drivers/etnaviv/etnaviv_emit.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c b/src/gallium/drivers/etnaviv/etnaviv_emit.c index 999d2ca06a5..41504ac41fe 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_emit.c +++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c @@ -391,18 +391,18 @@ etna_emit_state(struct etna_context *ctx) /*00644*/ EMIT_STATE_RELOC(FE_INDEX_STREAM_BASE_ADDR, &ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR); /*00648*/ EMIT_STATE(FE_INDEX_STREAM_CONTROL, ctx->index_buffer.FE_INDEX_STREAM_CONTROL); } - if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) { + if (likely((dirty & (ETNA_DIRTY_VERTEX_BUFFERS) && ctx->specs.stream_count == 1))) { /*0064C*/ EMIT_STATE_RELOC(FE_VERTEX_STREAM_BASE_ADDR, &ctx->vertex_buffer.cvb[0].FE_VERTEX_STREAM_BASE_ADDR); /*00650*/ EMIT_STATE(FE_VERTEX_STREAM_CONTROL, ctx->vertex_buffer.cvb[0].FE_VERTEX_STREAM_CONTROL); } if (likely(dirty & (ETNA_DIRTY_INDEX_BUFFER))) { /*00674*/ EMIT_STATE(FE_PRIMITIVE_RESTART_INDEX, ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX); } - if (likely(dirty & (ETNA_DIRTY_VERTEX_BUFFERS))) { - for (int x = 1; x < ctx->vertex_buffer.count; ++x) { + if (likely((dirty & (ETNA_DIRTY_VERTEX_BUFFERS)) && ctx->specs.stream_count > 1)) { + for (int x = 0; x < ctx->vertex_buffer.count; ++x) { /*00680*/ EMIT_STATE_RELOC(FE_VERTEX_STREAMS_BASE_ADDR(x), &ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR); } - for (int x = 1; x < ctx->vertex_buffer.count; ++x) { + for (int x = 0; x < ctx->vertex_buffer.count; ++x) { if (ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_BASE_ADDR.bo) { /*006A0*/ EMIT_STATE(FE_VERTEX_STREAMS_CONTROL(x), ctx->vertex_buffer.cvb[x].FE_VERTEX_STREAM_CONTROL); } |