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author[email protected] <[email protected]>2018-02-22 18:02:18 -0800
committerDave Airlie <[email protected]>2018-03-05 13:29:39 +1000
commitfe0647df5a70a4954d9399f0860a12ff691a88ee (patch)
tree3ae3ba13740ca4cdf64794bf0a136ab1331f26f5
parent9283cf2ad19b0eacc20b9aa5984bac077e9c475c (diff)
virgl: add offset alignment values to to v2 caps struct
glBindBufferRange(..) in vrend_draw_bind_ubo is failing with more than one uniform block. This is due to improper alignment of the start of the second block. Let's query the proper alignment from the driver and pass it back to Mesa. Let's query for the texture alignment too, even though the Virgl renderer doesn't call glTexBufferRange yet. The default values are the widest workable range possible (for example, GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT on Nvidia is 256). Fixes: dEQP-GLES3.functional.ubo.* on Nvidia Example test: dEQP-GLES3.functional.ubo.multi_basic_types.single_buffer.shared_vertex Note: This is based on "virgl: reduce some default capset limits.", which hasn't landed in Mesa yet but should relatively soon. Signed-off-by: Dave Airlie <[email protected]>
-rw-r--r--src/gallium/drivers/virgl/virgl_hw.h2
-rw-r--r--src/gallium/drivers/virgl/virgl_screen.c4
-rw-r--r--src/gallium/drivers/virgl/virgl_winsys.h2
3 files changed, 6 insertions, 2 deletions
diff --git a/src/gallium/drivers/virgl/virgl_hw.h b/src/gallium/drivers/virgl/virgl_hw.h
index 833ab91eee7..93849c03ddd 100644
--- a/src/gallium/drivers/virgl/virgl_hw.h
+++ b/src/gallium/drivers/virgl/virgl_hw.h
@@ -284,6 +284,8 @@ struct virgl_caps_v2 {
int32_t max_texel_offset;
int32_t min_texture_gather_offset;
int32_t max_texture_gather_offset;
+ uint32_t texture_buffer_offset_alignment;
+ uint32_t uniform_buffer_offset_alignment;
};
union virgl_caps {
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index 22a694ea271..49a0c57cda9 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -140,7 +140,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_USER_VERTEX_BUFFERS:
return 0;
case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
- return 16;
+ return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
return vscreen->caps.caps.v1.bset.streamout_pause_resume;
@@ -163,7 +163,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
return vscreen->caps.caps.v1.max_tbo_size > 0;
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
- return 0;
+ return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
return 0;
case PIPE_CAP_CUBE_MAP_ARRAY:
diff --git a/src/gallium/drivers/virgl/virgl_winsys.h b/src/gallium/drivers/virgl/virgl_winsys.h
index 95e21a8afde..99e98ad9c9c 100644
--- a/src/gallium/drivers/virgl/virgl_winsys.h
+++ b/src/gallium/drivers/virgl/virgl_winsys.h
@@ -132,5 +132,7 @@ static inline void virgl_ws_fill_new_caps_defaults(struct virgl_drm_caps *caps)
caps->caps.v2.max_texel_offset = 7;
caps->caps.v2.min_texture_gather_offset = -8;
caps->caps.v2.max_texture_gather_offset = 7;
+ caps->caps.v2.texture_buffer_offset_alignment = 32;
+ caps->caps.v2.uniform_buffer_offset_alignment = 256;
}
#endif