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authorAntia Puentes <apuentes@igalia.com>2015-06-17 09:21:30 +0200
committerJason Ekstrand <jason.ekstrand@intel.com>2015-08-03 09:40:49 -0700
commitfa4731f4a53aa21e53a62f42f3afdc19b0ce4c8e (patch)
tree11fb0930b1cc5c6afbab743b3d4ce94cb2f6ed63
parentf14199a8fb802f6672d559fa958a5ee84e3e13f1 (diff)
i965/nir/vec4: Implement "bool<->int,float" format conversion
Used the same implementation than the vec4_visitor NIR. Adds NIR ALU operations: * nir_op_b2i * nir_op_b2f * nir_op_f2b * nir_op_i2b Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_nir.cpp19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 549ed1ba5dc..039309c5c0a 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -1005,6 +1005,25 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
emit(AND(dst, op[0], op[1]));
break;
+ case nir_op_b2i:
+ emit(AND(dst, op[0], src_reg(1)));
+ break;
+
+ case nir_op_b2f:
+ op[0].type = BRW_REGISTER_TYPE_D;
+ dst.type = BRW_REGISTER_TYPE_D;
+ emit(AND(dst, op[0], src_reg(0x3f800000u)));
+ dst.type = BRW_REGISTER_TYPE_F;
+ break;
+
+ case nir_op_f2b:
+ emit(CMP(dst, op[0], src_reg(0.0f), BRW_CONDITIONAL_NZ));
+ break;
+
+ case nir_op_i2b:
+ emit(CMP(dst, op[0], src_reg(0), BRW_CONDITIONAL_NZ));
+ break;
+
default:
unreachable("Unimplemented ALU operation");
}