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authorEric Anholt <[email protected]>2017-10-24 18:45:57 -0700
committerEric Anholt <[email protected]>2017-10-30 13:31:27 -0700
commitb1a8b3979c6f206ee80eaeb5d27fded6c995575e (patch)
tree5f56cf9ea5ad56088d756b7e7733ea3040cab515
parent1d8105a167fcaf4c5768714e60183c5a6feda4a7 (diff)
broadcom/vc5: Lay out MSAA textures/renderbuffers as UIF scaled by 4.
We just need to multiply width/height by 2 each, and always set them up as UIF tiling, since that's how the TLB will store them in raw (per-sample) mode.
-rw-r--r--src/gallium/drivers/vc5/vc5_resource.c45
-rw-r--r--src/gallium/drivers/vc5/vc5_state.c6
2 files changed, 37 insertions, 14 deletions
diff --git a/src/gallium/drivers/vc5/vc5_resource.c b/src/gallium/drivers/vc5/vc5_resource.c
index 45f94af0346..e1ed46039a1 100644
--- a/src/gallium/drivers/vc5/vc5_resource.c
+++ b/src/gallium/drivers/vc5/vc5_resource.c
@@ -367,7 +367,11 @@ vc5_setup_slices(struct vc5_resource *rsc, const char *caller)
uint32_t utile_h = vc5_utile_height(rsc->cpp);
uint32_t uif_block_w = utile_w * 2;
uint32_t uif_block_h = utile_h * 2;
- bool uif_top = false;
+ bool msaa = prsc->nr_samples > 1;
+ /* MSAA textures/renderbuffers are always laid out as single-level
+ * UIF.
+ */
+ bool uif_top = prsc->nr_samples > 1;
for (int i = prsc->last_level; i >= 0; i--) {
struct vc5_resource_slice *slice = &rsc->slices[i];
@@ -381,13 +385,13 @@ vc5_setup_slices(struct vc5_resource *rsc, const char *caller)
level_height = u_minify(pot_height, i);
}
+ if (msaa) {
+ level_width *= 2;
+ level_height *= 2;
+ }
+
if (!rsc->tiled) {
slice->tiling = VC5_TILING_RASTER;
- if (prsc->nr_samples > 1) {
- /* MSAA (4x) surfaces are stored as raw tile buffer contents. */
- level_width = align(level_width, 32);
- level_height = align(level_height, 32);
- }
} else {
if ((i != 0 || !uif_top) &&
(level_width <= utile_w ||
@@ -416,8 +420,7 @@ vc5_setup_slices(struct vc5_resource *rsc, const char *caller)
}
slice->offset = offset;
- slice->stride = (level_width * rsc->cpp *
- MAX2(prsc->nr_samples, 1));
+ slice->stride = level_width * rsc->cpp;
slice->size = level_height * slice->stride;
offset += slice->size;
@@ -482,10 +485,28 @@ vc5_resource_setup(struct pipe_screen *pscreen,
pipe_reference_init(&prsc->reference, 1);
prsc->screen = pscreen;
- if (prsc->nr_samples <= 1)
- rsc->cpp = util_format_get_blocksize(tmpl->format);
- else
- rsc->cpp = sizeof(uint32_t);
+ if (prsc->nr_samples <= 1) {
+ rsc->cpp = util_format_get_blocksize(prsc->format);
+ } else {
+ assert(vc5_rt_format_supported(prsc->format));
+ uint32_t output_image_format = vc5_get_rt_format(prsc->format);
+ uint32_t internal_type;
+ uint32_t internal_bpp;
+ vc5_get_internal_type_bpp_for_output_format(output_image_format,
+ &internal_type,
+ &internal_bpp);
+ switch (internal_bpp) {
+ case INTERNAL_BPP_32:
+ rsc->cpp = 4;
+ break;
+ case INTERNAL_BPP_64:
+ rsc->cpp = 8;
+ break;
+ case INTERNAL_BPP_128:
+ rsc->cpp = 16;
+ break;
+ }
+ }
assert(rsc->cpp);
diff --git a/src/gallium/drivers/vc5/vc5_state.c b/src/gallium/drivers/vc5/vc5_state.c
index eebf94b4b9c..817b6247d58 100644
--- a/src/gallium/drivers/vc5/vc5_state.c
+++ b/src/gallium/drivers/vc5/vc5_state.c
@@ -562,11 +562,13 @@ vc5_create_sampler_view(struct pipe_context *pctx, struct pipe_resource *prsc,
so->base.reference.count = 1;
so->base.context = pctx;
+ int msaa_scale = prsc->nr_samples > 1 ? 2 : 1;
+
struct V3D33_TEXTURE_SHADER_STATE state_unpacked = {
cl_packet_header(TEXTURE_SHADER_STATE),
- .image_width = prsc->width0,
- .image_height = prsc->height0,
+ .image_width = prsc->width0 * msaa_scale,
+ .image_height = prsc->height0 * msaa_scale,
.image_depth = prsc->depth0,
.texture_type = rsc->tex_format,