diff options
author | Bas Nieuwenhuizen <[email protected]> | 2018-06-17 03:37:49 +0200 |
---|---|---|
committer | Bas Nieuwenhuizen <[email protected]> | 2018-06-18 16:21:10 +0200 |
commit | a3d93eec7cbd3fb733c1ef3b16903265e8e61b23 (patch) | |
tree | 33ceacd7495f752b90c76c3afcdaec8577ee5c40 | |
parent | 4d08c1e7d15f7d2c0a406cf1c79314511778b38f (diff) |
radv: Use less conservative approximation for context rolls.
Drops the number of time we set the scissor by 4x for F1 2017,
which results in a consistent performance improvement of about 4%.
Reviewed-by: Samuel Pitoiset <[email protected]>
-rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index a07717c7196..ccaab63b84b 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -3299,10 +3299,13 @@ static bool radv_need_late_scissor_emission(struct radv_cmd_buffer *cmd_buffer, if (!cmd_buffer->device->physical_device->has_scissor_bug) return false; + uint32_t used_states = cmd_buffer->state.pipeline->graphics.needed_dynamic_state | ~RADV_CMD_DIRTY_DYNAMIC_ALL; + + /* Index & Vertex buffer don't change context regs, and pipeline is handled later. */ + used_states &= ~(RADV_CMD_DIRTY_INDEX_BUFFER | RADV_CMD_DIRTY_VERTEX_BUFFER | RADV_CMD_DIRTY_PIPELINE); + /* Assume all state changes except these two can imply context rolls. */ - if (cmd_buffer->state.dirty & ~(RADV_CMD_DIRTY_INDEX_BUFFER | - RADV_CMD_DIRTY_VERTEX_BUFFER | - RADV_CMD_DIRTY_PIPELINE)) + if (cmd_buffer->state.dirty & used_states) return true; if (cmd_buffer->state.emitted_pipeline != cmd_buffer->state.pipeline) |