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authorKenneth Graunke <[email protected]>2012-02-14 12:43:21 -0800
committerKenneth Graunke <[email protected]>2012-02-15 11:44:05 -0800
commit8ab02b511882857a09fceed0e93bf4a0b25c17b2 (patch)
tree9fe39aaa02c2f4b4ec31fbd068fa170f08cb4a57
parentc89b471f8cd3da6c07eb437caabb2e648027f8bb (diff)
i965/fs: Add a new fs_inst::regs_written function.
Certain instructions write more than one register. Texturing, for example, returns 4 registers. (We set rlen to 4 even for TXS and float shadow sampling.) Some math functions return 2. Most return 1. The next commit introduces a use of this function. NOTE: This is a candidate for the 8.0 branch (dependency of a fix). Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 060aa363746..0a37b39c09d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -286,6 +286,18 @@ public:
offset == inst->offset);
}
+ int regs_written()
+ {
+ if (is_tex())
+ return 4;
+
+ /* The SINCOS and INT_DIV_QUOTIENT_AND_REMAINDER math functions return 2,
+ * but we don't currently use them...nor do we have an opcode for them.
+ */
+
+ return 1;
+ }
+
bool is_tex()
{
return (opcode == SHADER_OPCODE_TEX ||