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authorMichal Krol <[email protected]>2008-08-18 15:57:39 +0200
committerMichal Krol <[email protected]>2008-08-18 17:20:08 +0200
commit880b751e8e21cab21a0d522346300f463fd9c634 (patch)
treefbeaf119f34ef0a546c7e59138f3f8c718b4652e
parente2da7edd642198d7c515dbc0b9ba77d4286c3262 (diff)
tgsi: Cosmetic changes.
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_exec.c31
1 files changed, 12 insertions, 19 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c
index 7974915211a..6b19ab5c8e8 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -63,6 +63,11 @@
#define TILE_BOTTOM_LEFT 2
#define TILE_BOTTOM_RIGHT 3
+#define CHAN_X 0
+#define CHAN_Y 1
+#define CHAN_Z 2
+#define CHAN_W 3
+
/*
* Shorthand locations of various utility registers (_I = Index, _C = Channel)
*/
@@ -96,9 +101,6 @@
#define TEMP_HALF_C TGSI_EXEC_TEMP_HALF_C
#define TEMP_R0 TGSI_EXEC_TEMP_R0
-#define FOR_EACH_CHANNEL(CHAN)\
- for (CHAN = 0; CHAN < 4; CHAN++)
-
#define IS_CHANNEL_ENABLED(INST, CHAN)\
((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN)))
@@ -106,11 +108,11 @@
((INST).FullDstRegisters[1].DstRegister.WriteMask & (1 << (CHAN)))
#define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
- FOR_EACH_CHANNEL( CHAN )\
+ for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
if (IS_CHANNEL_ENABLED( INST, CHAN ))
#define FOR_EACH_ENABLED_CHANNEL2(INST, CHAN)\
- FOR_EACH_CHANNEL( CHAN )\
+ for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
if (IS_CHANNEL_ENABLED2( INST, CHAN ))
@@ -118,14 +120,6 @@
#define UPDATE_EXEC_MASK(MACH) \
MACH->ExecMask = MACH->CondMask & MACH->LoopMask & MACH->ContMask & MACH->FuncMask
-
-#define CHAN_X 0
-#define CHAN_Y 1
-#define CHAN_Z 2
-#define CHAN_W 3
-
-
-
/**
* Initialize machine state by expanding tokens to full instructions,
* allocating temporary storage, setting up constants, etc.
@@ -1128,7 +1122,7 @@ store_dest(
{
union tgsi_exec_channel *dst;
- switch( reg->DstRegister.File ) {
+ switch (reg->DstRegister.File) {
case TGSI_FILE_NULL:
return;
@@ -1138,7 +1132,7 @@ store_dest(
break;
case TGSI_FILE_TEMPORARY:
- assert(reg->DstRegister.Index < TGSI_EXEC_NUM_TEMPS);
+ assert( reg->DstRegister.Index < TGSI_EXEC_NUM_TEMPS );
dst = &mach->Temps[reg->DstRegister.Index].xyzw[chan_index];
break;
@@ -1151,8 +1145,7 @@ store_dest(
return;
}
- switch (inst->Instruction.Saturate)
- {
+ switch (inst->Instruction.Saturate) {
case TGSI_SAT_NONE:
if (mach->ExecMask & 0x1)
dst->i[0] = chan->i[0];
@@ -1166,8 +1159,8 @@ store_dest(
case TGSI_SAT_ZERO_ONE:
/* XXX need to obey ExecMask here */
- micro_max(dst, chan, &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
- micro_min(dst, dst, &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C]);
+ micro_max( dst, chan, &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C] );
+ micro_min( dst, dst, &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C] );
break;
case TGSI_SAT_MINUS_PLUS_ONE: