iris: implement texture/memory barriers

3 files changed, 52 insertions, 0 deletions

diff --git a/src/gallium/drivers/iris/iris_context.c b/src/gallium/drivers/iris/iris_context.c
index 9d0ec83afb4..d0bc9e5e8dc 100644
--- a/src/gallium/drivers/iris/iris_context.c
+++ b/src/gallium/drivers/iris/iris_context.c
@@ -136,6 +136,7 @@ iris_create_context(struct pipe_screen *pscreen, void *priv, unsigned flags)
    iris_init_program_functions(ctx);
    iris_init_resource_functions(ctx);
    iris_init_query_functions(ctx);
+   iris_init_flush_functions(ctx);
 
    iris_init_program_cache(ice);
    iris_init_border_color_pool(ice);
diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h
index cda649127c7..5aba49a2832 100644
--- a/src/gallium/drivers/iris/iris_context.h
+++ b/src/gallium/drivers/iris/iris_context.h
@@ -390,6 +390,8 @@ void iris_render_cache_add_bo(struct iris_batch *batch,
 void iris_cache_flush_for_depth(struct iris_batch *batch, struct iris_bo *bo);
 void iris_depth_cache_add_bo(struct iris_batch *batch, struct iris_bo *bo);
 
+void iris_init_flush_functions(struct pipe_context *ctx);
+
 /* iris_blorp.c */
 
 void gen9_init_blorp(struct iris_context *ice);
diff --git a/src/gallium/drivers/iris/iris_pipe_control.c b/src/gallium/drivers/iris/iris_pipe_control.c
index ed261fdc1c0..1dcb0ad3e62 100644
--- a/src/gallium/drivers/iris/iris_pipe_control.c
+++ b/src/gallium/drivers/iris/iris_pipe_control.c
@@ -246,3 +246,52 @@ iris_depth_cache_add_bo(struct iris_batch *batch, struct iris_bo *bo)
 {
    _mesa_set_add(batch->cache.depth, bo);
 }
+
+static void
+iris_texture_barrier(struct pipe_context *ctx, unsigned flags)
+{
+   struct iris_context *ice = (void *) ctx;
+
+   // XXX: compute batch?
+
+   flush_depth_and_render_caches(&ice->render_batch);
+}
+
+static void
+iris_memory_barrier(struct pipe_context *ctx, unsigned flags)
+{
+   struct iris_context *ice = (void *) ctx;
+   unsigned bits = PIPE_CONTROL_DATA_CACHE_FLUSH | PIPE_CONTROL_CS_STALL;
+
+   if (flags & (PIPE_BARRIER_VERTEX_BUFFER |
+                PIPE_BARRIER_INDEX_BUFFER |
+                PIPE_BARRIER_INDIRECT_BUFFER)) {
+      bits |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
+   }
+
+   if (flags & PIPE_BARRIER_CONSTANT_BUFFER) {
+      bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
+              PIPE_CONTROL_CONST_CACHE_INVALIDATE;
+   }
+
+   if (flags & PIPE_BARRIER_TEXTURE) {
+      bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
+   }
+
+   if (flags & PIPE_BARRIER_FRAMEBUFFER) {
+      bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
+              PIPE_CONTROL_RENDER_TARGET_FLUSH;
+   }
+
+   // XXX: MAPPED_BUFFER, QUERY_BUFFER, STREAMOUT_BUFFER, GLOBAL_BUFFER?
+   // XXX: compute batch?
+
+   iris_emit_pipe_control_flush(&ice->render_batch, bits);
+}
+
+void
+iris_init_flush_functions(struct pipe_context *ctx)
+{
+   ctx->memory_barrier = iris_memory_barrier;
+   ctx->texture_barrier = iris_texture_barrier;
+}