diff options
author | Iago Toral Quiroga <[email protected]> | 2018-11-19 13:58:06 +0100 |
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committer | Iago Toral Quiroga <[email protected]> | 2018-11-21 08:07:22 +0100 |
commit | 387888e3b7c251548abe0eb641d2d795d4afd1d5 (patch) | |
tree | 13e9edeb3effe094a63a86dae3f977aad29ceede | |
parent | 2d3c466add25e49692bd833742bf2a3aac0d3801 (diff) |
nir/from_ssa: fix bit-size of temporary register
Reviewed-by: Jason Ekstrand <[email protected]>
-rw-r--r-- | src/compiler/nir/nir_from_ssa.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/compiler/nir/nir_from_ssa.c b/src/compiler/nir/nir_from_ssa.c index e13c510c111..8419b28576b 100644 --- a/src/compiler/nir/nir_from_ssa.c +++ b/src/compiler/nir/nir_from_ssa.c @@ -707,10 +707,13 @@ resolve_parallel_copy(nir_parallel_copy_instr *pcopy, nir_register *reg = nir_local_reg_create(state->builder.impl); reg->name = "copy_temp"; reg->num_array_elems = 0; - if (values[b].is_ssa) + if (values[b].is_ssa) { reg->num_components = values[b].ssa->num_components; - else + reg->bit_size = values[b].ssa->bit_size; + } else { reg->num_components = values[b].reg.reg->num_components; + reg->bit_size = values[b].reg.reg->bit_size; + } values[num_vals].is_ssa = false; values[num_vals].reg.reg = reg; |