diff options
| author | Samuel Pitoiset <[email protected]> | 2017-04-25 00:31:48 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2017-04-26 19:15:40 +0200 |
| commit | 0bceefc29591d64d5d529a726e68b837f1f504b2 (patch) | |
| tree | e39f446ed2c266d4dc2228335d60fda550d640c3 | |
| parent | 066a5729552925fc53e345b9e86a8699ba7ac451 (diff) | |
radeonsi: disable the TGSI merge registers pass
47109 shaders in 29632 tests
Totals:
SGPRS: 1917364 -> 1916620 (-0.04 %)
VGPRS: 1165802 -> 1165202 (-0.05 %)
Spilled SGPRs: 1880 -> 1843 (-1.97 %)
Spilled VGPRs: 70 -> 65 (-7.14 %)
Private memory VGPRs: 1184 -> 1184 (0.00 %)
Scratch size: 1312 -> 1308 (-0.30 %) dwords per thread
Code Size: 60211356 -> 60192268 (-0.03 %) bytes
LDS: 1077 -> 1077 (0.00 %) blocks
Max Waves: 428597 -> 428674 (0.02 %)
Wait states: 0 -> 0 (0.00 %)
Totals from affected shaders:
SGPRS: 238173 -> 237429 (-0.31 %)
VGPRS: 149556 -> 148956 (-0.40 %)
Spilled SGPRs: 1263 -> 1226 (-2.93 %)
Spilled VGPRs: 25 -> 20 (-20.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 20 -> 16 (-20.00 %) dwords per thread
Code Size: 10457904 -> 10438816 (-0.18 %) bytes
LDS: 50 -> 50 (0.00 %) blocks
Max Waves: 41283 -> 41360 (0.19 %)
Wait states: 0 -> 0 (0.00 %)
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 2a11607c905..cfbcbe2b745 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -680,6 +680,7 @@ static int si_get_shader_param(struct pipe_screen* pscreen, case PIPE_SHADER_CAP_INTEGERS: case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: + case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS: return 1; case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: @@ -693,7 +694,6 @@ static int si_get_shader_param(struct pipe_screen* pscreen, case PIPE_SHADER_CAP_SUPPORTED_IRS: case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: - case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS: return 0; } return 0; |