diff options
| author | Kenneth Graunke <[email protected]> | 2013-05-23 20:19:19 -0700 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2013-05-23 13:32:02 -0700 |
| commit | 062317d6671ed42ed10b24ee9d3df87c1dab279d (patch) | |
| tree | 8b74f110a4aea3175b2be598980b2ce41163140a | |
| parent | 95670bdee2f51196c1f34871a23faae1348d4b60 (diff) | |
i965: Go back to using the kernel SOL reset feature.
It turns out the MI_LOAD_REGISTER_IMM approach doesn't work on Haswell,
and regressed essentially all the transform feedback Piglit tests.
This morally reverts eaa6fbe6d54dc99efac4ab8e800edef65ce8220d. However,
the code is still simpler than it was. On BeginTransformFeedback, we
simply flush the batch and set the SOL reset flag so that the next batch
will start with zeroed offsets. There's still no software counting.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64887
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Paul Berry <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_sol_state.c | 10 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_batchbuffer.c | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_context.h | 1 |
3 files changed, 7 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c b/src/mesa/drivers/dri/i965/gen7_sol_state.c index 8dfac01ff02..9e5f5f72e83 100644 --- a/src/mesa/drivers/dri/i965/gen7_sol_state.c +++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c @@ -260,14 +260,8 @@ gen7_begin_transform_feedback(struct gl_context *ctx, GLenum mode, struct brw_context *brw = brw_context(ctx); struct intel_context *intel = &brw->intel; - /* Reset the SOL buffer offset register. */ - for (int i = 0; i < 4; i++) { - BEGIN_BATCH(3); - OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2)); - OUT_BATCH(GEN7_SO_WRITE_OFFSET(i)); - OUT_BATCH(0); - ADVANCE_BATCH(); - } + intel_batchbuffer_flush(intel); + intel->batch.needs_sol_reset = true; } void diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c index c7f6d56e559..8c6524e71af 100644 --- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c @@ -96,6 +96,7 @@ intel_batchbuffer_reset(struct intel_context *intel) intel->batch.reserved_space = BATCH_RESERVED; intel->batch.state_batch_offset = intel->batch.bo->size; intel->batch.used = 0; + intel->batch.needs_sol_reset = false; } void @@ -198,6 +199,9 @@ do_flush_locked(struct intel_context *intel) flags = I915_EXEC_BLT; } + if (batch->needs_sol_reset) + flags |= I915_EXEC_GEN7_SOL_RESET; + if (ret == 0) { if (unlikely(INTEL_DEBUG & DEBUG_AUB) && intel->vtbl.annotate_aub) intel->vtbl.annotate_aub(intel); diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index 8c50e6e6121..c0f07ff1f3c 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -135,6 +135,7 @@ struct intel_batchbuffer { uint32_t state_batch_offset; bool is_blit; + bool needs_sol_reset; struct { uint16_t used; |