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authorSamuel Pitoiset <[email protected]>2018-11-12 17:57:11 +0100
committerSamuel Pitoiset <[email protected]>2018-11-19 16:32:16 +0100
commit7dcddbe54d6302d70cac573ba62000e7bd0e48e4 (patch)
tree0288631839be9f39bf5cab999cc1c3feedc87b7a
parent9133bbf18611204b2000d89e47b469a3de8d556a (diff)
radv: rewrite the condition that checks allowed depth/stencil values
Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
-rw-r--r--src/amd/vulkan/radv_meta_clear.c12
1 files changed, 4 insertions, 8 deletions
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 4d8a6a91602..9f74936e988 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -826,8 +826,10 @@ emit_fast_htile_clear(struct radv_cmd_buffer *cmd_buffer,
!(aspects & VK_IMAGE_ASPECT_STENCIL_BIT)))
return false;
- if (!radv_is_fast_clear_depth_allowed(clear_value) ||
- !(aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
+ if (((aspects & VK_IMAGE_ASPECT_DEPTH_BIT) &&
+ !radv_is_fast_clear_depth_allowed(clear_value)) ||
+ ((aspects & VK_IMAGE_ASPECT_STENCIL_BIT) &&
+ !radv_is_fast_clear_stencil_allowed(clear_value)))
return false;
/* GFX8 only supports 32-bit depth surfaces but we can enable TC-compat
@@ -838,12 +840,6 @@ emit_fast_htile_clear(struct radv_cmd_buffer *cmd_buffer,
iview->image->vk_format == VK_FORMAT_D16_UNORM)
return false;
- if (vk_format_aspects(iview->image->vk_format) & VK_IMAGE_ASPECT_STENCIL_BIT) {
- if (!radv_is_fast_clear_stencil_allowed(clear_value) ||
- !(aspects & VK_IMAGE_ASPECT_STENCIL_BIT))
- return false;
- }
-
clear_word = radv_get_htile_fast_clear_value(iview->image, clear_value);
if (pre_flush) {