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authorIlia Mirkin <[email protected]>2017-02-05 13:08:07 -0500
committerIlia Mirkin <[email protected]>2017-02-09 12:57:49 -0500
commit1e4f5988edd2fb9eafcf5010498b0e93bae1ae26 (patch)
treec72eb72557489f547b007bc7ebd5494989326e4d
parentab00a41a6e111a8243028bc4de5f52035aa30f36 (diff)
nvc0: expose int64
Signed-off-by: Ilia Mirkin <[email protected]>
-rw-r--r--docs/features.txt2
-rw-r--r--docs/relnotes/17.1.0.html2
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_screen.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/docs/features.txt b/docs/features.txt
index 9ac02723b91..5905dba9b39 100644
--- a/docs/features.txt
+++ b/docs/features.txt
@@ -283,7 +283,7 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve
GL_ARB_ES3_2_compatibility DONE (i965/gen8+)
GL_ARB_fragment_shader_interlock not started
GL_ARB_gl_spirv not started
- GL_ARB_gpu_shader_int64 DONE (i965/gen8+, radeonsi, softpipe, llvmpipe)
+ GL_ARB_gpu_shader_int64 DONE (i965/gen8+, nvc0, radeonsi, softpipe, llvmpipe)
GL_ARB_indirect_parameters DONE (nvc0, radeonsi)
GL_ARB_parallel_shader_compile not started, but Chia-I Wu did some related work in 2014
GL_ARB_pipeline_statistics_query DONE (i965, nvc0, radeonsi, softpipe, swr)
diff --git a/docs/relnotes/17.1.0.html b/docs/relnotes/17.1.0.html
index 57a5ca8d1f0..6a0dae4e36b 100644
--- a/docs/relnotes/17.1.0.html
+++ b/docs/relnotes/17.1.0.html
@@ -44,7 +44,7 @@ Note: some of the new features are only available with certain drivers.
</p>
<ul>
-<li>GL_ARB_gpu_shader_int64 on i965/gen8+, radeonsi, softpipe, llvmpipe</li>
+<li>GL_ARB_gpu_shader_int64 on i965/gen8+, nvc0, radeonsi, softpipe, llvmpipe</li>
</ul>
<h2>Bug fixes</h2>
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index e99dc4cd89b..30efac82233 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -244,6 +244,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
+ case PIPE_CAP_INT64:
return 1;
case PIPE_CAP_COMPUTE:
return (class_3d < GP100_3D_CLASS);
@@ -281,7 +282,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
- case PIPE_CAP_INT64:
case PIPE_CAP_INT64_DIVMOD:
return 0;