i965g: non-glsl fragment shader path is compiling

Disabled glsl code for now, probably want to clean this up somehow.

8 files changed, 230 insertions, 192 deletions

diff --git a/src/gallium/drivers/i965/Makefile b/src/gallium/drivers/i965/Makefile
index c3dbad72ae6..896cb234a63 100644
--- a/src/gallium/drivers/i965/Makefile
+++ b/src/gallium/drivers/i965/Makefile
@@ -47,7 +47,6 @@ C_SOURCES = \
 	brw_wm_debug.c \
 	brw_wm_emit.c \
 	brw_wm_fp.c \
-	brw_wm_glsl.c \
 	brw_wm_iz.c \
 	brw_wm_pass0.c \
 	brw_wm_pass1.c \
diff --git a/src/gallium/drivers/i965/brw_wm.c b/src/gallium/drivers/i965/brw_wm.c
index 33602b59c1b..4fbf9de9bbc 100644
--- a/src/gallium/drivers/i965/brw_wm.c
+++ b/src/gallium/drivers/i965/brw_wm.c
@@ -177,7 +177,10 @@ static int do_wm_prog( struct brw_context *brw,
     */
    if (fp->has_flow_control) {
       c->dispatch_width = 8;
-      brw_wm_branching_shader_emit(brw, c);
+      /* XXX: GLSL support
+       */
+      exit(1);
+      //brw_wm_branching_shader_emit(brw, c);
    }
    else {
       c->dispatch_width = 16;
@@ -239,18 +242,9 @@ static void brw_wm_populate_key( struct brw_context *brw,
 		    brw->curr.fragment_shader->uses_depth,
 		    key);
 
-   /* Revisit this, figure out if it's really useful, and either push
-    * it into the state tracker so that everyone benefits (use to
-    * create fs varients with TEX rather than TXP), or discard.
-    */
-   key->proj_attrib_mask = ~0; /*brw->wm.input_size_masks[4-1];*/
-
    /* PIPE_NEW_RAST */
    key->flat_shade = brw->curr.rast->templ.flatshade;
 
-   /* This can be determined by looking at the INTERP mode each input decl.
-    */
-   key->linear_attrib_mask = 0;
 
    /* PIPE_NEW_BOUND_TEXTURES */
    for (i = 0; i < brw->curr.num_textures; i++) {
diff --git a/src/gallium/drivers/i965/brw_wm.h b/src/gallium/drivers/i965/brw_wm.h
index 8ee99420aa5..48dac397561 100644
--- a/src/gallium/drivers/i965/brw_wm.h
+++ b/src/gallium/drivers/i965/brw_wm.h
@@ -56,9 +56,6 @@
 #define AA_ALWAYS    2
 
 struct brw_wm_prog_key {
-   unsigned proj_attrib_mask;    /**< one bit per fragment program attribute */
-   unsigned linear_attrib_mask;  /**< linear interpolation vs perspective interp */
-
    GLuint source_depth_reg:3;
    GLuint aa_dest_stencil_reg:3;
    GLuint dest_depth_reg:3;
@@ -73,6 +70,7 @@ struct brw_wm_prog_key {
    GLuint yuvtex_swap_mask:16;	/* UV swaped */
 
    GLuint vp_nr_outputs:6;
+   GLuint nr_inputs:6;
    GLuint nr_cbufs:3;
    GLuint has_flow_control:1;
 
@@ -179,6 +177,12 @@ struct brw_wm_instruction {
 #define BRW_FILE_PAYLOAD   (TGSI_FILE_COUNT)
 #define PAYLOAD_DEPTH      (PIPE_MAX_SHADER_INPUTS) /* ?? */
 
+#define X    0
+#define Y    1
+#define Z    2
+#define W    3
+#define GET_SWZ(swz, comp) (((swz) >> ((comp)*2)) & 0x3)
+
 
 struct brw_fp_src {
    unsigned file:4;
diff --git a/src/gallium/drivers/i965/brw_wm_fp.c b/src/gallium/drivers/i965/brw_wm_fp.c
index 57933afbbee..58f1d35b7df 100644
--- a/src/gallium/drivers/i965/brw_wm_fp.c
+++ b/src/gallium/drivers/i965/brw_wm_fp.c
@@ -46,11 +46,6 @@
 #include "brw_debug.h"
 
 
-#define X    0
-#define Y    1
-#define Z    2
-#define W    3
-#define GET_SWZ(swz, comp) (((swz) >> ((comp)*2)) & 0x3)
 
 
 static const char *wm_opcode_strings[] = {
@@ -850,7 +845,7 @@ static GLboolean projtex( struct brw_wm_compile *c,
    
    if (src.file == TGSI_FILE_INPUT && 
        GET_SWZ(src.swizzle, W) == W &&
-       (c->key.proj_attrib_mask & (1 << src.index)) == 0)
+       c->fp->info.input_interpolate[src.index] != TGSI_INTERPOLATE_PERSPECTIVE)
       return GL_FALSE;
 
    return GL_TRUE;
diff --git a/src/gallium/drivers/i965/brw_wm_glsl.c b/src/gallium/drivers/i965/brw_wm_glsl.c
index cdc10484a6e..a06b0a446ef 100644
--- a/src/gallium/drivers/i965/brw_wm_glsl.c
+++ b/src/gallium/drivers/i965/brw_wm_glsl.c
@@ -1,10 +1,13 @@
+#include "util/u_math.h"
+
+
 #include "brw_context.h"
 #include "brw_eu.h"
 #include "brw_wm.h"
 
 
 static struct brw_reg get_dst_reg(struct brw_wm_compile *c,
-                                  const struct prog_instruction *inst,
+                                  const struct brw_fp_instruction *inst,
                                   GLuint component);
 
 
@@ -63,7 +66,7 @@ alloc_grf(struct brw_wm_compile *c)
    /* really, no free GRF regs found */
    if (!c->out_of_regs) {
       /* print warning once per compilation */
-      _mesa_warning(NULL, "i965: ran out of registers for fragment program");
+      debug_printf("%s: ran out of registers for fragment program", __FUNCTION__);
       c->out_of_regs = GL_TRUE;
    }
 
@@ -154,20 +157,18 @@ get_reg(struct brw_wm_compile *c, int file, int index, int component,
 {
     struct brw_reg reg;
     switch (file) {
-	case PROGRAM_STATE_VAR:
-	case PROGRAM_CONSTANT:
-	case PROGRAM_UNIFORM:
-	    file = PROGRAM_STATE_VAR;
-	    break;
-	case PROGRAM_UNDEFINED:
+	case TGSI_FILE_NULL:
 	    return brw_null_reg();	
-	case PROGRAM_TEMPORARY:
-	case PROGRAM_INPUT:
-	case PROGRAM_OUTPUT:
-	case PROGRAM_PAYLOAD:
+
+	case TGSI_FILE_CONSTANT:
+	case TGSI_FILE_TEMPORARY:
+	case TGSI_FILE_INPUT:
+	case TGSI_FILE_OUTPUT:
+	case BRW_FILE_PAYLOAD:
 	    break;
+
 	default:
-	   debug_printf("Unexpected file in get_reg()");
+	   debug_printf("%s: Unexpected file type\n", __FUNCTION__);
 	   return brw_null_reg();
     }
 
@@ -204,6 +205,76 @@ get_reg(struct brw_wm_compile *c, int file, int index, int component,
 
 
 
+
+/**
+ * Find first/last instruction that references each temporary register.
+ */
+GLboolean
+_mesa_find_temp_intervals(const struct prog_instruction *instructions,
+                          GLuint numInstructions,
+                          GLint intBegin[MAX_PROGRAM_TEMPS],
+                          GLint intEnd[MAX_PROGRAM_TEMPS])
+{
+   struct loop_info
+   {
+      GLuint Start, End;  /**< Start, end instructions of loop */
+   };
+   struct loop_info loopStack[MAX_LOOP_NESTING];
+   GLuint loopStackDepth = 0;
+   GLuint i;
+
+   for (i = 0; i < MAX_PROGRAM_TEMPS; i++){
+      intBegin[i] = intEnd[i] = -1;
+   }
+
+   /* Scan instructions looking for temporary registers */
+   for (i = 0; i < numInstructions; i++) {
+      const struct prog_instruction *inst = instructions + i;
+      if (inst->Opcode == OPCODE_BGNLOOP) {
+         loopStack[loopStackDepth].Start = i;
+         loopStack[loopStackDepth].End = inst->BranchTarget;
+         loopStackDepth++;
+      }
+      else if (inst->Opcode == OPCODE_ENDLOOP) {
+         loopStackDepth--;
+      }
+      else if (inst->Opcode == OPCODE_CAL) {
+         return GL_FALSE;
+      }
+      else {
+         const GLuint numSrc = 3;
+         GLuint j;
+         for (j = 0; j < numSrc; j++) {
+            if (inst->SrcReg[j].File == PROGRAM_TEMPORARY) {
+               const GLuint index = inst->SrcReg[j].Index;
+               if (inst->SrcReg[j].RelAddr)
+                  return GL_FALSE;
+               update_interval(intBegin, intEnd, index, i);
+               if (loopStackDepth > 0) {
+                  /* extend temp register's interval to end of loop */
+                  GLuint loopEnd = loopStack[loopStackDepth - 1].End;
+                  update_interval(intBegin, intEnd, index, loopEnd);
+               }
+            }
+         }
+         if (inst->DstReg.File == PROGRAM_TEMPORARY) {
+            const GLuint index = inst->DstReg.Index;
+            if (inst->DstReg.RelAddr)
+               return GL_FALSE;
+            update_interval(intBegin, intEnd, index, i);
+            if (loopStackDepth > 0) {
+               /* extend temp register's interval to end of loop */
+               GLuint loopEnd = loopStack[loopStackDepth - 1].End;
+               update_interval(intBegin, intEnd, index, loopEnd);
+            }
+         }
+      }
+   }
+
+   return GL_TRUE;
+}
+
+
 /**
  * This is called if we run out of GRF registers.  Examine the live intervals
  * of temp regs in the program and free those which won't be used again.
@@ -211,29 +282,29 @@ get_reg(struct brw_wm_compile *c, int file, int index, int component,
 static void
 reclaim_temps(struct brw_wm_compile *c)
 {
-   GLint intBegin[MAX_PROGRAM_TEMPS];
-   GLint intEnd[MAX_PROGRAM_TEMPS];
+   GLint intBegin[BRW_WM_MAX_TEMPS];
+   GLint intEnd[BRW_WM_MAX_TEMPS];
    int index;
 
    /*printf("Reclaim temps:\n");*/
 
-   _mesa_find_temp_intervals(c->prog_instructions, c->nr_fp_insns,
+   _mesa_find_temp_intervals(c->fp_instructions, c->nr_fp_insns,
                              intBegin, intEnd);
 
-   for (index = 0; index < MAX_PROGRAM_TEMPS; index++) {
+   for (index = 0; index < BRW_WM_MAX_TEMPS; index++) {
       if (intEnd[index] != -1 && intEnd[index] < c->cur_inst) {
          /* program temp[i] can be freed */
          int component;
          /*printf("  temp[%d] is dead\n", index);*/
          for (component = 0; component < 4; component++) {
-            if (c->wm_regs[PROGRAM_TEMPORARY][index][component].inited) {
-               int r = c->wm_regs[PROGRAM_TEMPORARY][index][component].reg.nr;
+            if (c->wm_regs[TGSI_FILE_TEMPORARY][index][component].inited) {
+               int r = c->wm_regs[TGSI_FILE_TEMPORARY][index][component].reg.nr;
                release_grf(c, r);
                /*
                printf("  Reclaim temp %d, reg %d at inst %d\n",
                       index, r, c->cur_inst);
                */
-               c->wm_regs[PROGRAM_TEMPORARY][index][component].inited = GL_FALSE;
+               c->wm_regs[TGSI_FILE_TEMPORARY][index][component].inited = GL_FALSE;
             }
          }
       }
@@ -264,7 +335,7 @@ static void prealloc_reg(struct brw_wm_compile *c)
             reg = brw_vec8_grf(i * 2, 0);
         else
             reg = brw_vec8_grf(0, 0);
-	set_reg(c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, i, reg);
+	set_reg(c, TGSI_FILE_PAYLOAD, PAYLOAD_DEPTH, i, reg);
     }
     reg_index += 2 * c->key.nr_depth_regs;
 
@@ -306,7 +377,7 @@ static void prealloc_reg(struct brw_wm_compile *c)
                   * Constants will be copied in prepare_constant_buffer()
                   */
                  c->prog_data.param[index] = &plist->ParameterValues[i][j];
-                 set_reg(c, PROGRAM_STATE_VAR, i, j, reg);
+                 set_reg(c, TGSI_FILE_STATE_VAR, i, j, reg);
               }
            }
            /* number of constant regs used (each reg is float[8]) */
@@ -330,7 +401,7 @@ static void prealloc_reg(struct brw_wm_compile *c)
 	  urb_read_length = reg_index;
 	  reg = brw_vec8_grf(reg_index, 0);
 	  for (j = 0; j < 4; j++)
-	     set_reg(c, PROGRAM_PAYLOAD, fp_input, j, reg);
+	     set_reg(c, TGSI_FILE_PAYLOAD, fp_input, j, reg);
        }
        if (c->key.nr_vp_outputs > i) {
 	  reg_index += 2;
@@ -354,7 +425,7 @@ static void prealloc_reg(struct brw_wm_compile *c)
     prealloc_grf(c, 127);
 
     for (i = 0; i < c->nr_fp_insns; i++) {
-	const struct prog_instruction *inst = &c->prog_instructions[i];
+	const struct brw_fp_instruction *inst = &c->fp_instructions[i];
 	struct brw_reg dst[4];
 
 	switch (inst->Opcode) {
@@ -397,7 +468,7 @@ static void prealloc_reg(struct brw_wm_compile *c)
  * the three GRF slots.
  */
 static void fetch_constants(struct brw_wm_compile *c,
-                            const struct prog_instruction *inst)
+                            const struct brw_fp_instruction *inst)
 {
    struct brw_compile *p = &c->func;
    GLuint i;
@@ -405,9 +476,8 @@ static void fetch_constants(struct brw_wm_compile *c,
    /* loop over instruction src regs */
    for (i = 0; i < 3; i++) {
       const struct prog_src_register *src = &inst->SrcReg[i];
-      if (src->File == PROGRAM_STATE_VAR ||
-          src->File == PROGRAM_CONSTANT ||
-          src->File == PROGRAM_UNIFORM) {
+      if (src->File == TGSI_FILE_IMMEDIATE ||
+          src->File == TGSI_FILE_CONSTANT) {
 	 c->current_const[i].index = src->Index;
 
 #if 0
@@ -431,7 +501,7 @@ static void fetch_constants(struct brw_wm_compile *c,
  * Convert Mesa dst register to brw register.
  */
 static struct brw_reg get_dst_reg(struct brw_wm_compile *c, 
-                                  const struct prog_instruction *inst,
+                                  const struct brw_fp_instruction *inst,
                                   GLuint component)
 {
     const int nr = 1;
@@ -442,7 +512,7 @@ static struct brw_reg get_dst_reg(struct brw_wm_compile *c,
 
 static struct brw_reg
 get_src_reg_const(struct brw_wm_compile *c,
-                  const struct prog_instruction *inst,
+                  const struct brw_fp_instruction *inst,
                   GLuint srcRegIndex, GLuint component)
 {
    /* We should have already fetched the constant from the constant
@@ -462,7 +532,7 @@ get_src_reg_const(struct brw_wm_compile *c,
    const_reg = stride(const_reg, 0, 1, 0);
    const_reg.subnr = component * 4;
 
-   if (src->Negate & (1 << component))
+   if (src->Negate)
       const_reg = negate(const_reg);
    if (src->Abs)
       const_reg = brw_abs(const_reg);
@@ -483,7 +553,7 @@ get_src_reg_const(struct brw_wm_compile *c,
  * Convert Mesa src register to brw register.
  */
 static struct brw_reg get_src_reg(struct brw_wm_compile *c, 
-                                  const struct prog_instruction *inst,
+                                  const struct brw_fp_instruction *inst,
                                   GLuint srcRegIndex, GLuint channel)
 {
     const struct prog_src_register *src = &inst->SrcReg[srcRegIndex];
@@ -499,9 +569,9 @@ static struct brw_reg get_src_reg(struct brw_wm_compile *c,
     }
 
     if (c->fp->use_const_buffer &&
-        (src->File == PROGRAM_STATE_VAR ||
-         src->File == PROGRAM_CONSTANT ||
-         src->File == PROGRAM_UNIFORM)) {
+        (src->File == TGSI_FILE_STATE_VAR ||
+         src->File == TGSI_FILE_CONSTANT ||
+         src->File == TGSI_FILE_UNIFORM)) {
        return get_src_reg_const(c, inst, srcRegIndex, component);
     }
     else {
@@ -513,26 +583,26 @@ static struct brw_reg get_src_reg(struct brw_wm_compile *c,
 
 
 /**
- * Same as \sa get_src_reg() but if the register is a literal, emit
- * a brw_reg encoding the literal.
- * Note that a brw instruction only allows one src operand to be a literal.
+ * Same as \sa get_src_reg() but if the register is a immediate, emit
+ * a brw_reg encoding the immediate.
+ * Note that a brw instruction only allows one src operand to be a immediate.
  * For instructions with more than one operand, only the second can be a
- * literal.  This means that we treat some literals as constants/uniforms
- * (which why PROGRAM_CONSTANT is checked in fetch_constants()).
+ * immediate.  This means that we treat some immediates as constants
+ * (which why TGSI_FILE_IMMEDIATE is checked in fetch_constants()).
  * 
  */
 static struct brw_reg get_src_reg_imm(struct brw_wm_compile *c, 
-                                      const struct prog_instruction *inst,
+                                      const struct brw_fp_instruction *inst,
                                       GLuint srcRegIndex, GLuint channel)
 {
     const struct prog_src_register *src = &inst->SrcReg[srcRegIndex];
-    if (src->File == PROGRAM_CONSTANT) {
-       /* a literal */
+    if (src->File == TGSI_FILE_IMMEDIATE) {
+       /* an immediate */
        const int component = GET_SWZ(src->Swizzle, channel);
        const GLfloat *param =
           c->fp->program.Base.Parameters->ParameterValues[src->Index];
        GLfloat value = param[component];
-       if (src->Negate & (1 << channel))
+       if (src->Negate)
           value = -value;
        if (src->Abs)
           value = FABSF(value);
@@ -612,7 +682,7 @@ static void invoke_subroutine( struct brw_wm_compile *c,
 }
 
 static void emit_trunc( struct brw_wm_compile *c,
-                        const struct prog_instruction *inst)
+                        const struct brw_fp_instruction *inst)
 {
     int i;
     struct brw_compile *p = &c->func;
@@ -630,7 +700,7 @@ static void emit_trunc( struct brw_wm_compile *c,
 }
 
 static void emit_mov( struct brw_wm_compile *c,
-                      const struct prog_instruction *inst)
+                      const struct brw_fp_instruction *inst)
 {
     int i;
     struct brw_compile *p = &c->func;
@@ -650,7 +720,7 @@ static void emit_mov( struct brw_wm_compile *c,
 }
 
 static void emit_pixel_xy(struct brw_wm_compile *c,
-                          const struct prog_instruction *inst)
+                          const struct brw_fp_instruction *inst)
 {
     struct brw_reg r1 = brw_vec1_grf(1, 0);
     struct brw_reg r1_uw = retype(r1, BRW_REGISTER_TYPE_UW);
@@ -680,7 +750,7 @@ static void emit_pixel_xy(struct brw_wm_compile *c,
 }
 
 static void emit_delta_xy(struct brw_wm_compile *c,
-                          const struct prog_instruction *inst)
+                          const struct brw_fp_instruction *inst)
 {
     struct brw_reg r1 = brw_vec1_grf(1, 0);
     struct brw_reg dst0, dst1, src0, src1;
@@ -740,7 +810,7 @@ static void fire_fb_write( struct brw_wm_compile *c,
 }
 
 static void emit_fb_write(struct brw_wm_compile *c,
-                          const struct prog_instruction *inst)
+                          const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     int nr = 2;
@@ -808,7 +878,7 @@ static void emit_fb_write(struct brw_wm_compile *c,
 }
 
 static void emit_pixel_w( struct brw_wm_compile *c,
-                          const struct prog_instruction *inst)
+                          const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     GLuint mask = inst->DstReg.WriteMask;
@@ -838,7 +908,7 @@ static void emit_pixel_w( struct brw_wm_compile *c,
 }
 
 static void emit_linterp(struct brw_wm_compile *c,
-                         const struct prog_instruction *inst)
+                         const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     GLuint mask = inst->DstReg.WriteMask;
@@ -867,7 +937,7 @@ static void emit_linterp(struct brw_wm_compile *c,
 }
 
 static void emit_cinterp(struct brw_wm_compile *c,
-                         const struct prog_instruction *inst)
+                         const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     GLuint mask = inst->DstReg.WriteMask;
@@ -893,7 +963,7 @@ static void emit_cinterp(struct brw_wm_compile *c,
 }
 
 static void emit_pinterp(struct brw_wm_compile *c,
-                         const struct prog_instruction *inst)
+                         const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     GLuint mask = inst->DstReg.WriteMask;
@@ -927,7 +997,7 @@ static void emit_pinterp(struct brw_wm_compile *c,
 
 /* Sets the destination channels to 1.0 or 0.0 according to glFrontFacing. */
 static void emit_frontfacing(struct brw_wm_compile *c,
-			     const struct prog_instruction *inst)
+			     const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     struct brw_reg r1_6ud = retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD);
@@ -956,7 +1026,7 @@ static void emit_frontfacing(struct brw_wm_compile *c,
 }
 
 static void emit_xpd(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     int i;
     struct brw_compile *p = &c->func;
@@ -981,13 +1051,13 @@ static void emit_xpd(struct brw_wm_compile *c,
 }
 
 static void emit_dp3(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     struct brw_reg src0[3], src1[3], dst;
     int i;
     struct brw_compile *p = &c->func;
     GLuint mask = inst->DstReg.WriteMask;
-    int dst_chan = _mesa_ffs(mask & WRITEMASK_XYZW) - 1;
+    int dst_chan = ffs(mask & WRITEMASK_XYZW) - 1;
 
     if (!(mask & WRITEMASK_XYZW))
 	return;
@@ -1008,13 +1078,13 @@ static void emit_dp3(struct brw_wm_compile *c,
 }
 
 static void emit_dp4(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     struct brw_reg src0[4], src1[4], dst;
     int i;
     struct brw_compile *p = &c->func;
     GLuint mask = inst->DstReg.WriteMask;
-    int dst_chan = _mesa_ffs(mask & WRITEMASK_XYZW) - 1;
+    int dst_chan = ffs(mask & WRITEMASK_XYZW) - 1;
 
     if (!(mask & WRITEMASK_XYZW))
 	return;
@@ -1035,13 +1105,13 @@ static void emit_dp4(struct brw_wm_compile *c,
 }
 
 static void emit_dph(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     struct brw_reg src0[4], src1[4], dst;
     int i;
     struct brw_compile *p = &c->func;
     GLuint mask = inst->DstReg.WriteMask;
-    int dst_chan = _mesa_ffs(mask & WRITEMASK_XYZW) - 1;
+    int dst_chan = ffs(mask & WRITEMASK_XYZW) - 1;
 
     if (!(mask & WRITEMASK_XYZW))
 	return;
@@ -1067,12 +1137,12 @@ static void emit_dph(struct brw_wm_compile *c,
  * register's X, Y, Z and W channels (subject to writemasking of course).
  */
 static void emit_math1(struct brw_wm_compile *c,
-                       const struct prog_instruction *inst, GLuint func)
+                       const struct brw_fp_instruction *inst, GLuint func)
 {
     struct brw_compile *p = &c->func;
     struct brw_reg src0, dst;
     GLuint mask = inst->DstReg.WriteMask;
-    int dst_chan = _mesa_ffs(mask & WRITEMASK_XYZW) - 1;
+    int dst_chan = ffs(mask & WRITEMASK_XYZW) - 1;
 
     if (!(mask & WRITEMASK_XYZW))
 	return;
@@ -1095,43 +1165,43 @@ static void emit_math1(struct brw_wm_compile *c,
 }
 
 static void emit_rcp(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     emit_math1(c, inst, BRW_MATH_FUNCTION_INV);
 }
 
 static void emit_rsq(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     emit_math1(c, inst, BRW_MATH_FUNCTION_RSQ);
 }
 
 static void emit_sin(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     emit_math1(c, inst, BRW_MATH_FUNCTION_SIN);
 }
 
 static void emit_cos(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     emit_math1(c, inst, BRW_MATH_FUNCTION_COS);
 }
 
 static void emit_ex2(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     emit_math1(c, inst, BRW_MATH_FUNCTION_EXP);
 }
 
 static void emit_lg2(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     emit_math1(c, inst, BRW_MATH_FUNCTION_LOG);
 }
 
 static void emit_add(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     struct brw_reg src0, src1, dst;
@@ -1150,7 +1220,7 @@ static void emit_add(struct brw_wm_compile *c,
 }
 
 static void emit_arl(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     struct brw_reg src0, addr_reg;
@@ -1164,7 +1234,7 @@ static void emit_arl(struct brw_wm_compile *c,
 
 
 static void emit_mul(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     struct brw_reg src0, src1, dst;
@@ -1183,7 +1253,7 @@ static void emit_mul(struct brw_wm_compile *c,
 }
 
 static void emit_frc(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     struct brw_reg src0, dst;
@@ -1202,7 +1272,7 @@ static void emit_frc(struct brw_wm_compile *c,
 }
 
 static void emit_flr(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     struct brw_reg src0, dst;
@@ -1221,7 +1291,7 @@ static void emit_flr(struct brw_wm_compile *c,
 
 
 static void emit_min_max(struct brw_wm_compile *c,
-                         const struct prog_instruction *inst)
+                         const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     const GLuint mask = inst->DstReg.WriteMask;
@@ -1269,12 +1339,12 @@ static void emit_min_max(struct brw_wm_compile *c,
 }
 
 static void emit_pow(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     struct brw_reg dst, src0, src1;
     GLuint mask = inst->DstReg.WriteMask;
-    int dst_chan = _mesa_ffs(mask & WRITEMASK_XYZW) - 1;
+    int dst_chan = ffs(mask & WRITEMASK_XYZW) - 1;
 
     if (!(mask & WRITEMASK_XYZW))
 	return;
@@ -1299,7 +1369,7 @@ static void emit_pow(struct brw_wm_compile *c,
 }
 
 static void emit_lrp(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     GLuint mask = inst->DstReg.WriteMask;
@@ -1352,7 +1422,7 @@ static void emit_kil(struct brw_wm_compile *c)
 }
 
 static void emit_mad(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     GLuint mask = inst->DstReg.WriteMask;
@@ -1375,7 +1445,7 @@ static void emit_mad(struct brw_wm_compile *c,
 }
 
 static void emit_sop(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst, GLuint cond)
+                     const struct brw_fp_instruction *inst, GLuint cond)
 {
     struct brw_compile *p = &c->func;
     GLuint mask = inst->DstReg.WriteMask;
@@ -1399,37 +1469,37 @@ static void emit_sop(struct brw_wm_compile *c,
 }
 
 static void emit_slt(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     emit_sop(c, inst, BRW_CONDITIONAL_L);
 }
 
 static void emit_sle(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     emit_sop(c, inst, BRW_CONDITIONAL_LE);
 }
 
 static void emit_sgt(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     emit_sop(c, inst, BRW_CONDITIONAL_G);
 }
 
 static void emit_sge(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     emit_sop(c, inst, BRW_CONDITIONAL_GE);
 }
 
 static void emit_seq(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     emit_sop(c, inst, BRW_CONDITIONAL_EQ);
 }
 
 static void emit_sne(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     emit_sop(c, inst, BRW_CONDITIONAL_NEQ);
 }
@@ -1459,7 +1529,7 @@ static INLINE struct brw_reg odd_bytes( struct brw_reg reg )
 
     
 static void emit_wpos_xy(struct brw_wm_compile *c,
-                         const struct prog_instruction *inst)
+                         const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     GLuint mask = inst->DstReg.WriteMask;
@@ -1494,25 +1564,25 @@ static void emit_wpos_xy(struct brw_wm_compile *c,
    BIAS on SIMD8 not working yet...
  */	
 static void emit_txb(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     struct brw_reg dst[4], src[4], payload_reg;
-    /* Note: TexSrcUnit was already looked up through SamplerTextures[] */
-    const GLuint unit = inst->TexSrcUnit;
+    /* Note: tex_unit was already looked up through SamplerTextures[] */
+    const GLuint unit = inst->tex_unit;
     GLuint i;
     GLuint msg_type;
 
     assert(unit < BRW_MAX_TEX_UNIT);
 
-    payload_reg = get_reg(c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, 0, 1, 0, 0);
+    payload_reg = get_reg(c, TGSI_FILE_PAYLOAD, PAYLOAD_DEPTH, 0, 1, 0, 0);
 
     for (i = 0; i < 4; i++) 
 	dst[i] = get_dst_reg(c, inst, i);
     for (i = 0; i < 4; i++)
 	src[i] = get_src_reg(c, inst, 0, i);
 
-    switch (inst->TexSrcTarget) {
+    switch (inst->tex_target) {
 	case TEXTURE_1D_INDEX:
 	    brw_MOV(p, brw_message_reg(2), src[0]);         /* s coord */
 	    brw_MOV(p, brw_message_reg(3), brw_imm_f(0));   /* t coord */
@@ -1561,12 +1631,12 @@ static void emit_txb(struct brw_wm_compile *c,
 
 
 static void emit_tex(struct brw_wm_compile *c,
-                     const struct prog_instruction *inst)
+                     const struct brw_fp_instruction *inst)
 {
     struct brw_compile *p = &c->func;
     struct brw_reg dst[4], src[4], payload_reg;
-    /* Note: TexSrcUnit was already looked up through SamplerTextures[] */
-    const GLuint unit = inst->TexSrcUnit;
+    /* Note: tex_unit was already looked up through SamplerTextures[] */
+    const GLuint unit = inst->tex_unit;
     GLuint msg_len;
     GLuint i, nr;
     GLuint emit;
@@ -1575,14 +1645,14 @@ static void emit_tex(struct brw_wm_compile *c,
 
     assert(unit < BRW_MAX_TEX_UNIT);
 
-    payload_reg = get_reg(c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, 0, 1, 0, 0);
+    payload_reg = get_reg(c, TGSI_FILE_PAYLOAD, PAYLOAD_DEPTH, 0, 1, 0, 0);
 
     for (i = 0; i < 4; i++) 
 	dst[i] = get_dst_reg(c, inst, i);
     for (i = 0; i < 4; i++)
 	src[i] = get_src_reg(c, inst, 0, i);
 
-    switch (inst->TexSrcTarget) {
+    switch (inst->tex_target) {
 	case TEXTURE_1D_INDEX:
 	    emit = WRITEMASK_X;
 	    nr = 1;
@@ -1657,7 +1727,7 @@ static void post_wm_emit( struct brw_wm_compile *c )
 
 static void
 get_argument_regs(struct brw_wm_compile *c,
-		  const struct prog_instruction *inst,
+		  const struct brw_fp_instruction *inst,
 		  int index,
 		  struct brw_reg *regs,
 		  int mask)
@@ -1686,7 +1756,7 @@ static void brw_wm_emit_branching_shader(struct brw_context *brw, struct brw_wm_
     brw_MOV(p, get_addr_reg(stack_index), brw_address(c->stack));
 
     for (i = 0; i < c->nr_fp_insns; i++) {
-        const struct prog_instruction *inst = &c->prog_instructions[i];
+        const struct brw_fp_instruction *inst = &c->fp_instructions[i];
 	int dst_flags;
 	struct brw_reg args[3][4], dst[4];
 	int j;
diff --git a/src/gallium/drivers/i965/brw_wm_pass0.c b/src/gallium/drivers/i965/brw_wm_pass0.c
index d8b9028927f..7b18335dec7 100644
--- a/src/gallium/drivers/i965/brw_wm_pass0.c
+++ b/src/gallium/drivers/i965/brw_wm_pass0.c
@@ -28,9 +28,10 @@
   * Authors:
   *   Keith Whitwell <[email protected]>
   */
-                 
 
-#include "brw_context.h"
+#include "util/u_memory.h"
+
+#include "brw_debug.h"
 #include "brw_wm.h"
 
 
@@ -133,19 +134,19 @@ static const struct brw_wm_ref *get_imm_ref( struct brw_wm_compile *c,
    /* Search for an existing const value matching the request:
     */
    for (i = 0; i < c->nr_imm_refs; i++) {
-      if (c->imm_ref[i].imm_val == *imm1f) 
+      if (c->imm_ref[i].imm1f == *imm1f) 
 	 return c->imm_ref[i].ref;
    }
 
    /* Else try to add a new one:
     */
-   if (c->nr_imm_refs < BRW_WM_MAX_IMM) {
+   if (c->nr_imm_refs < Elements(c->imm_ref)) {
       GLuint i = c->nr_imm_refs++;
 
       /* An immediate is a special type of parameter:
        */
-      c->imm_ref[i].imm_val = *imm_val;
-      c->imm_ref[i].ref = get_param_ref(c, imm_val);
+      c->imm_ref[i].imm1f = *imm1f;
+      c->imm_ref[i].ref = get_param_ref(c, imm1f);
 
       return c->imm_ref[i].ref;
    }
@@ -180,7 +181,7 @@ static const struct brw_wm_ref *pass0_get_reg( struct brw_wm_compile *c,
 	 break;
 
       case TGSI_FILE_IMMEDIATE:
-	 ref = get_imm_ref(c, &plist->ParameterValues[idx][component]);
+	 ref = get_imm_ref(c, &c->immediate[idx].v[component]);
 	 break;
 
       default:
@@ -205,16 +206,16 @@ static const struct brw_wm_ref *pass0_get_reg( struct brw_wm_compile *c,
 
 static void pass0_set_dst( struct brw_wm_compile *c,
 			   struct brw_wm_instruction *out,
-			   const struct prog_instruction *inst,
+			   const struct brw_fp_instruction *inst,
 			   GLuint writemask )
 {
-   const struct prog_dst_register *dst = &inst->DstReg;
+   const struct brw_fp_dst dst = inst->dst;
    GLuint i;
 
    for (i = 0; i < 4; i++) {
       if (writemask & (1<<i)) {
 	 out->dst[i] = get_value(c);
-	 pass0_set_fpreg_value(c, dst->File, dst->Index, i, out->dst[i]);
+	 pass0_set_fpreg_value(c, dst.file, dst.index, i, out->dst[i]);
       }
    }
 
@@ -223,27 +224,15 @@ static void pass0_set_dst( struct brw_wm_compile *c,
 
 
 static const struct brw_wm_ref *get_fp_src_reg_ref( struct brw_wm_compile *c,
-						    struct prog_src_register src,
+						    struct brw_fp_src src,
 						    GLuint i )
 {
-   GLuint component = GET_SWZ(src.Swizzle,i);
-   const struct brw_wm_ref *src_ref;
-   static const GLfloat const_zero = 0.0;
-   static const GLfloat const_one = 1.0;
-
-   if (component == SWIZZLE_ZERO) 
-      src_ref = get_imm_ref(c, &const_zero);
-   else if (component == SWIZZLE_ONE) 
-      src_ref = get_imm_ref(c, &const_one);
-   else 
-      src_ref = pass0_get_reg(c, src.File, src.Index, component);
-
-   return src_ref;
+   return pass0_get_reg(c, src.file, src.index, GET_SWZ(src.swizzle,i));
 }
 
 
 static struct brw_wm_ref *get_new_ref( struct brw_wm_compile *c,
-				       struct prog_src_register src,
+				       struct brw_fp_src src,
 				       GLuint i,
 				       struct brw_wm_instruction *insn)
 {
@@ -259,10 +248,10 @@ static struct brw_wm_ref *get_new_ref( struct brw_wm_compile *c,
       newref->value->lastuse = newref;
    }
 
-   if (src.Negate & (1 << i))
+   if (src.negate)
       newref->hw_reg.negate ^= 1;
 
-   if (src.Abs) {
+   if (src.abs) {
       newref->hw_reg.negate = 0;
       newref->hw_reg.abs = 1;
    }
@@ -273,21 +262,21 @@ static struct brw_wm_ref *get_new_ref( struct brw_wm_compile *c,
 
 static void
 translate_insn(struct brw_wm_compile *c,
-               const struct prog_instruction *inst)
+               const struct brw_fp_instruction *inst)
 {
    struct brw_wm_instruction *out = get_instruction(c);
-   GLuint writemask = inst->dst.WriteMask;
-   GLuint nr_args = brw_wm_nr_args(inst->Opcode);
+   GLuint writemask = inst->dst.writemask;
+   GLuint nr_args = brw_wm_nr_args(inst->opcode);
    GLuint i, j;
 
    /* Copy some data out of the instruction
     */
-   out->opcode = inst->Opcode;
-   out->saturate = inst->dst.Saturate;
-   out->tex_unit = inst->TexSrcUnit;
-   out->tex_target = inst->TexSrcTarget;
-   out->eot = inst->Aux & 1;
-   out->target = inst->Aux >> 1;
+   out->opcode = inst->opcode;
+   out->saturate = inst->dst.saturate;
+   out->tex_unit = inst->tex_unit;
+   out->tex_target = inst->tex_target;
+   out->eot = inst->eot; //inst->Aux & 1;
+   out->target = inst->target; //inst->Aux >> 1;
 
    /* Args:
     */
@@ -308,10 +297,10 @@ translate_insn(struct brw_wm_compile *c,
  * Optimize moves and swizzles away:
  */ 
 static void pass0_precalc_mov( struct brw_wm_compile *c,
-			       const struct prog_instruction *inst )
+			       const struct brw_fp_instruction *inst )
 {
-   const struct prog_dst_register *dst = &inst->DstReg;
-   GLuint writemask = inst->DstReg.WriteMask;
+   const struct brw_fp_dst dst = inst->dst;
+   GLuint writemask = dst.writemask;
    struct brw_wm_ref *refs[4];
    GLuint i;
 
@@ -323,11 +312,11 @@ static void pass0_precalc_mov( struct brw_wm_compile *c,
     * one loop and the above case was incorrectly handled.
     */
    for (i = 0; i < 4; i++) {
-      refs[i] = get_new_ref(c, inst->SrcReg[0], i, NULL);
+      refs[i] = get_new_ref(c, inst->src[0], i, NULL);
    }
    for (i = 0; i < 4; i++) {
       if (writemask & (1 << i)) {	    
-         pass0_set_fpreg_ref( c, dst->File, dst->Index, i, refs[i]);
+         pass0_set_fpreg_ref( c, dst.file, dst.index, i, refs[i]);
       }
    }
 }
@@ -341,12 +330,12 @@ static void pass0_init_payload( struct brw_wm_compile *c )
 
    for (i = 0; i < 4; i++) {
       GLuint j = i >= c->key.nr_depth_regs ? 0 : i;
-      pass0_set_fpreg_value( c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, i, 
+      pass0_set_fpreg_value( c, BRW_FILE_PAYLOAD, PAYLOAD_DEPTH, i, 
 			     &c->payload.depth[j] );
    }
 
-   for (i = 0; i < FRAG_ATTRIB_MAX; i++)
-      pass0_set_fpreg_value( c, PROGRAM_PAYLOAD, i, 0, 
+   for (i = 0; i < c->key.nr_inputs; i++)
+      pass0_set_fpreg_value( c, BRW_FILE_PAYLOAD, i, 0, 
 			     &c->payload.input_interp[i] );      
 }
 
@@ -360,7 +349,7 @@ static void pass0_init_payload( struct brw_wm_compile *c )
  *
  * Translate away swizzling and eliminate non-saturating moves.
  *
- * Translate instructions from Mesa's prog_instruction structs to our
+ * Translate instructions from our fp_instruction structs to our
  * internal brw_wm_instruction representation.
  */
 void brw_wm_pass0( struct brw_wm_compile *c )
@@ -374,13 +363,13 @@ void brw_wm_pass0( struct brw_wm_compile *c )
    pass0_init_payload(c);
 
    for (insn = 0; insn < c->nr_fp_insns; insn++) {
-      const struct prog_instruction *inst = &c->prog_instructions[insn];
+      const struct brw_fp_instruction *inst = &c->fp_instructions[insn];
 
       /* Optimize away moves, otherwise emit translated instruction:
        */      
-      switch (inst->Opcode) {
-      case OPCODE_MOV: 
-	 if (!inst->dst.Saturate) {
+      switch (inst->opcode) {
+      case TGSI_OPCODE_MOV: 
+	 if (!inst->dst.saturate) {
 	    pass0_precalc_mov(c, inst);
 	 }
 	 else {
diff --git a/src/gallium/drivers/i965/brw_wm_pass1.c b/src/gallium/drivers/i965/brw_wm_pass1.c
index b0356b1bd59..09ad2b8f5b8 100644
--- a/src/gallium/drivers/i965/brw_wm_pass1.c
+++ b/src/gallium/drivers/i965/brw_wm_pass1.c
@@ -30,8 +30,8 @@
   */
                   
 
-#include "brw_context.h"
 #include "brw_wm.h"
+#include "brw_debug.h"
 
 
 static GLuint get_tracked_mask(struct brw_wm_compile *c,
@@ -223,11 +223,11 @@ void brw_wm_pass1( struct brw_wm_compile *c )
 
       case TGSI_OPCODE_TEX:
       case TGSI_OPCODE_TXP:
-	 read0 = get_texcoord_mask(inst->tex_idx);
+	 read0 = get_texcoord_mask(inst->tex_target);
 	 break;
 
       case TGSI_OPCODE_TXB:
-	 read0 = get_texcoord_mask(inst->tex_idx) | BRW_WRITEMASK_W;
+	 read0 = get_texcoord_mask(inst->tex_target) | BRW_WRITEMASK_W;
 	 break;
 
       case WM_WPOSXY:
@@ -276,7 +276,7 @@ void brw_wm_pass1( struct brw_wm_compile *c )
 
       case TGSI_OPCODE_DST:
       case WM_FRONTFACING:
-      case TGSI_OPCODE_KIL_NV:
+      case TGSI_OPCODE_KILP:
       default:
 	 break;
       }
diff --git a/src/gallium/drivers/i965/brw_wm_pass2.c b/src/gallium/drivers/i965/brw_wm_pass2.c
index a19ca623287..d3d678a5e65 100644
--- a/src/gallium/drivers/i965/brw_wm_pass2.c
+++ b/src/gallium/drivers/i965/brw_wm_pass2.c
@@ -30,7 +30,7 @@
   */
                    
 
-#include "brw_context.h"
+#include "brw_debug.h"
 #include "brw_wm.h"
 
 
@@ -82,27 +82,14 @@ static void init_registers( struct brw_wm_compile *c )
    for (j = 0; j < c->nr_creg; j++) 
       prealloc_reg(c, &c->creg[j], i++);
 
-   for (j = 0; j < FRAG_ATTRIB_MAX; j++) {
-      if (c->key.vp_outputs_written & (1<<j)) {
-	 int fp_index;
-
-	 if (j >= VERT_RESULT_VAR0)
-	    fp_index = j - (VERT_RESULT_VAR0 - FRAG_ATTRIB_VAR0);
-	 else if (j <= VERT_RESULT_TEX7)
-	    fp_index = j;
-	 else
-	    fp_index = -1;
-
-	 nr_interp_regs++;
-	 if (fp_index >= 0)
-	    prealloc_reg(c, &c->payload.input_interp[fp_index], i++);
-      }
+   for (j = 0; j < c->key.vp_nr_outputs; j++) {
+      prealloc_reg(c, &c->payload.input_interp[j], i++);
    }
 
    assert(nr_interp_regs >= 1);
 
    c->prog_data.first_curbe_grf = c->key.nr_depth_regs * 2;
-   c->prog_data.urb_read_length = nr_interp_regs * 2;
+   c->prog_data.urb_read_length = c->key.vp_nr_outputs * 2;
    c->prog_data.curb_read_length = c->nr_creg * 2;
 
    c->max_wm_grf = i * 2;
@@ -308,9 +295,9 @@ void brw_wm_pass2( struct brw_wm_compile *c )
       /* Allocate registers to hold results:
        */
       switch (inst->opcode) {
-      case OPCODE_TEX:
-      case OPCODE_TXB:
-      case OPCODE_TXP:
+      case TGSI_OPCODE_TEX:
+      case TGSI_OPCODE_TXB:
+      case TGSI_OPCODE_TXP:
 	 alloc_contiguous_dest(c, inst->dst, 4, insn);
 	 break;