diff options
author | Tom Stellard <[email protected]> | 2012-05-23 13:19:36 -0400 |
---|---|---|
committer | Tom Stellard <[email protected]> | 2012-05-24 14:12:30 -0400 |
commit | d4984f346320e64b58e38e443e5b99d09b7067bc (patch) | |
tree | 056fd343d50ca50224f620412ba04d40c0199e9b | |
parent | 5523502ff917803166051c8947f5dd3b23c6fcf8 (diff) |
radeon/llvm: Add custom SDNode for FRACT
-rw-r--r-- | src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl | 3 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/AMDGPUISelLowering.cpp | 3 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/AMDGPUISelLowering.h | 1 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/AMDGPUInstrInfo.td | 3 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/AMDILInstructions.td | 1 | ||||
-rw-r--r-- | src/gallium/drivers/radeon/R600Instructions.td | 5 |
6 files changed, 10 insertions, 6 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl b/src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl index 2b83273cc87..d346f8ca571 100644 --- a/src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl +++ b/src/gallium/drivers/radeon/AMDGPUGenInstrEnums.pl @@ -32,7 +32,6 @@ use warnings; use strict; my @F32_MULTICLASSES = qw { - UnaryIntrinsicFloat UnaryIntrinsicFloatScalar }; @@ -55,7 +54,7 @@ my $FILE_TYPE = $ARGV[0]; open AMDIL, '<', 'AMDILInstructions.td'; -my @INST_ENUMS = ('NONE', 'FEQ', 'FGE', 'FLT', 'FNE', 'MOVE_f32', 'MOVE_i32', 'FTOI', 'ITOF', 'UGT', 'IGE', 'INE', 'UGE', 'IEQ', 'BINARY_OR_i32', 'BINARY_NOT_i32'); +my @INST_ENUMS = ('NONE', 'FEQ', 'FGE', 'FLT', 'FNE', 'MOVE_f32', 'MOVE_i32', 'FTOI', 'ITOF', 'UGT', 'IGE', 'INE', 'UGE', 'IEQ', 'BINARY_OR_i32', 'BINARY_NOT_i32', 'ROUND_POSINF_f32', 'ROUND_NEAREST_f32'); while (<AMDIL>) { if ($_ =~ /defm\s+([A-Z_]+)\s+:\s+([A-Za-z0-9]+)</) { diff --git a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp index e90d71a5c27..ced949ed3d5 100644 --- a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp +++ b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp @@ -51,6 +51,8 @@ SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, return LowerIntrinsicIABS(Op, DAG); case AMDGPUIntrinsic::AMDGPU_lrp: return LowerIntrinsicLRP(Op, DAG); + case AMDGPUIntrinsic::AMDIL_fraction: + return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1)); case AMDGPUIntrinsic::AMDIL_mad: return DAG.getNode(AMDILISD::MAD, DL, VT, Op.getOperand(1), Op.getOperand(2), Op.getOperand(3)); @@ -252,6 +254,7 @@ const char* AMDGPUTargetLowering::getTargetNodeName(unsigned Opcode) const switch (Opcode) { default: return AMDILTargetLowering::getTargetNodeName(Opcode); + NODE_NAME_CASE(FRACT) NODE_NAME_CASE(FMAX) NODE_NAME_CASE(SMAX) NODE_NAME_CASE(UMAX) diff --git a/src/gallium/drivers/radeon/AMDGPUISelLowering.h b/src/gallium/drivers/radeon/AMDGPUISelLowering.h index f1544b86920..81bc608cebf 100644 --- a/src/gallium/drivers/radeon/AMDGPUISelLowering.h +++ b/src/gallium/drivers/radeon/AMDGPUISelLowering.h @@ -56,6 +56,7 @@ namespace AMDGPUISD enum { AMDGPU_FIRST = AMDILISD::LAST_NON_MEMORY_OPCODE, + FRACT, FMAX, SMAX, UMAX, diff --git a/src/gallium/drivers/radeon/AMDGPUInstrInfo.td b/src/gallium/drivers/radeon/AMDGPUInstrInfo.td index b6e0807453d..f511d3b9b57 100644 --- a/src/gallium/drivers/radeon/AMDGPUInstrInfo.td +++ b/src/gallium/drivers/radeon/AMDGPUInstrInfo.td @@ -15,6 +15,9 @@ // AMDGPU DAG Nodes // +// out = a - floor(a) +def AMDGPUfract : SDNode<"AMDGPUISD::FRACT", SDTFPUnaryOp>; + // out = max(a, b) a and b are floats def AMDGPUfmax : SDNode<"AMDGPUISD::FMAX", SDTFPBinOp, [SDNPCommutative, SDNPAssociative] diff --git a/src/gallium/drivers/radeon/AMDILInstructions.td b/src/gallium/drivers/radeon/AMDILInstructions.td index 8f22d6672fb..f7bf31f6c60 100644 --- a/src/gallium/drivers/radeon/AMDILInstructions.td +++ b/src/gallium/drivers/radeon/AMDILInstructions.td @@ -214,7 +214,6 @@ def LUSHR : TwoInOneOut<IL_OP_U64_SHR, (outs GPRI64:$dst), //===---------------------------------------------------------------------===// let mayLoad=0, mayStore=0 in { defm ABS : UnaryIntrinsicFloat<IL_OP_ABS, int_AMDIL_fabs>; -defm FRAC : UnaryIntrinsicFloat<IL_OP_FRC, int_AMDIL_fraction>; defm PIREDUCE : UnaryIntrinsicFloat<IL_OP_PI_REDUCE, int_AMDIL_pireduce>; defm ROUND_NEAREST : UnaryIntrinsicFloat<IL_OP_ROUND_NEAR, int_AMDIL_round_nearest>; diff --git a/src/gallium/drivers/radeon/R600Instructions.td b/src/gallium/drivers/radeon/R600Instructions.td index 978ccecd339..670598fc31d 100644 --- a/src/gallium/drivers/radeon/R600Instructions.td +++ b/src/gallium/drivers/radeon/R600Instructions.td @@ -358,9 +358,8 @@ def SNE : R600_2OP < def FRACT : R600_1OP < 0x10, "FRACT", - []> { - let AMDILOp = AMDILInst.FRAC_f32; -} + [(set R600_Reg32:$dst, (AMDGPUfract R600_Reg32:$src))] +>; def TRUNC : R600_1OP < 0x11, "TRUNC", |