diff options
author | Jason Ekstrand <[email protected]> | 2018-10-16 14:58:18 -0500 |
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committer | Jason Ekstrand <[email protected]> | 2018-10-26 16:39:35 -0500 |
commit | b6b2b27809b9ce1cb8fdeb63fb4244c8a584434e (patch) | |
tree | 85687331a9979e2e26144d9f17a7dc7bb58fdfb4 | |
parent | 2318ca68bbeb4fa6e21a4d8c650cec3f64246596 (diff) |
blorp: Emit a dummy 3DSTATE_WM prior to 3DSTATE_WM_HZ_OP
Cc: [email protected]
Suggested-by: Francisco Jerez <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
-rw-r--r-- | src/intel/blorp/blorp_genX_exec.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 7a8c45dbee5..065980616ec 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -1642,6 +1642,15 @@ blorp_emit_gen8_hiz_op(struct blorp_batch *batch, blorp_emit_cc_viewport(batch); } + /* According to the SKL PRM formula for WM_INT::ThreadDispatchEnable, the + * 3DSTATE_WM::ForceThreadDispatchEnable field can force WM thread dispatch + * even when WM_HZ_OP is active. However, WM thread dispatch is normally + * disabled for HiZ ops and it appears that force-enabling it can lead to + * GPU hangs on at least Skylake. Since we don't know the current state of + * the 3DSTATE_WM packet, just emit a dummy one prior to 3DSTATE_WM_HZ_OP. + */ + blorp_emit(batch, GENX(3DSTATE_WM), wm); + /* If we can't alter the depth stencil config and multiple layers are * involved, the HiZ op will fail. This is because the op requires that a * new config is emitted for each additional layer. |