diff options
author | Eric Engestrom <[email protected]> | 2017-06-01 14:48:06 +0100 |
---|---|---|
committer | Eric Engestrom <[email protected]> | 2017-06-07 01:18:09 +0100 |
commit | 63a8a88ac4b91a90ee7484b34abeb86e529234e7 (patch) | |
tree | 957709652b3329783acb94fd9921bd8e26d87b63 | |
parent | f0b82bc5450b0f12290875f7ab01b22eb0115e83 (diff) |
tree-wide: remove trailing backslash
Simple search for a backslash followed by two newlines.
If one of the newlines were to be removed, this would cause issues, so
let's just remove these trailing backslashes.
Signed-off-by: Eric Engestrom <[email protected]>
Reviewed-by: Ian Romanick <[email protected]>
-rw-r--r-- | src/amd/common/amd_kernel_code_t.h | 2 | ||||
-rw-r--r-- | src/compiler/nir/nir_builder.h | 2 | ||||
-rw-r--r-- | src/gallium/auxiliary/draw/draw_gs_tmp.h | 2 | ||||
-rw-r--r-- | src/gallium/auxiliary/draw/draw_prim_assembler_tmp.h | 2 | ||||
-rw-r--r-- | src/gallium/auxiliary/draw/draw_so_emit_tmp.h | 2 | ||||
-rw-r--r-- | src/gallium/drivers/r600/sb/sb_bc.h | 2 | ||||
-rw-r--r-- | src/gallium/drivers/svga/svga_winsys.h | 2 | ||||
-rw-r--r-- | src/gallium/drivers/swr/rasterizer/memory/ClearTile.cpp | 4 | ||||
-rw-r--r-- | src/intel/compiler/brw_inst.h | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_vertprog.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/x11/xmesaP.h | 2 | ||||
-rw-r--r-- | src/mesa/math/m_debug_util.h | 2 | ||||
-rw-r--r-- | src/mesa/sparc/sparc_matrix.h | 2 | ||||
-rw-r--r-- | src/mesa/x86/mmx_blend.S | 2 | ||||
-rw-r--r-- | src/mesa/x86/read_rgba_span_x86.S | 2 |
15 files changed, 16 insertions, 16 deletions
diff --git a/src/amd/common/amd_kernel_code_t.h b/src/amd/common/amd_kernel_code_t.h index d0d7809da10..f8e95085181 100644 --- a/src/amd/common/amd_kernel_code_t.h +++ b/src/amd/common/amd_kernel_code_t.h @@ -36,7 +36,7 @@ // Gets bits for specified mask from specified src packed instance. #define AMD_HSA_BITS_GET(src, mask) \ - ((src & mask) >> mask ## _SHIFT) \ + ((src & mask) >> mask ## _SHIFT) /* Every amd_*_code_t has the following properties, which are composed of * a number of bit fields. Every bit field has a mask (AMD_CODE_PROPERTY_*), diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h index 7dbf8efbb34..7c65886356d 100644 --- a/src/compiler/nir/nir_builder.h +++ b/src/compiler/nir/nir_builder.h @@ -621,7 +621,7 @@ nir_load_system_value(nir_builder *build, nir_intrinsic_op op, int index) nir_load_##name(nir_builder *build) \ { \ return nir_load_system_value(build, nir_intrinsic_load_##name, 0); \ - } \ + } #include "nir_intrinsics.h" diff --git a/src/gallium/auxiliary/draw/draw_gs_tmp.h b/src/gallium/auxiliary/draw/draw_gs_tmp.h index b10bbc413d9..bf276d38224 100644 --- a/src/gallium/auxiliary/draw/draw_gs_tmp.h +++ b/src/gallium/auxiliary/draw/draw_gs_tmp.h @@ -22,7 +22,7 @@ default: \ break; \ } \ - } while (0) \ + } while (0) #define POINT(i0) gs_point(gs,i0) #define LINE(flags,i0,i1) gs_line(gs,i0,i1) diff --git a/src/gallium/auxiliary/draw/draw_prim_assembler_tmp.h b/src/gallium/auxiliary/draw/draw_prim_assembler_tmp.h index bff6d556ed0..145a8ca74e9 100644 --- a/src/gallium/auxiliary/draw/draw_prim_assembler_tmp.h +++ b/src/gallium/auxiliary/draw/draw_prim_assembler_tmp.h @@ -19,7 +19,7 @@ return; \ default: \ break; \ - } \ + } #define POINT(i0) prim_point(asmblr, i0) diff --git a/src/gallium/auxiliary/draw/draw_so_emit_tmp.h b/src/gallium/auxiliary/draw/draw_so_emit_tmp.h index 282a52d1c01..c3a4695c1f2 100644 --- a/src/gallium/auxiliary/draw/draw_so_emit_tmp.h +++ b/src/gallium/auxiliary/draw/draw_so_emit_tmp.h @@ -22,7 +22,7 @@ default: \ break; \ } \ - } while (0) \ + } while (0) #define POINT(i0) so_point(so,i0) #define LINE(flags,i0,i1) so_line(so,i0,i1) diff --git a/src/gallium/drivers/r600/sb/sb_bc.h b/src/gallium/drivers/r600/sb/sb_bc.h index 2c662acf914..fed041cf506 100644 --- a/src/gallium/drivers/r600/sb/sb_bc.h +++ b/src/gallium/drivers/r600/sb/sb_bc.h @@ -787,7 +787,7 @@ public: \ } \ unsigned get_##name() const { \ return (value>>(first_bit))&((1ull<<((last_bit)-(first_bit)+1))-1); \ - } \ + } #define BC_RSRVD(fmt, last_bit, first_bit) diff --git a/src/gallium/drivers/svga/svga_winsys.h b/src/gallium/drivers/svga/svga_winsys.h index 3bb23ce1438..376707dbf53 100644 --- a/src/gallium/drivers/svga/svga_winsys.h +++ b/src/gallium/drivers/svga/svga_winsys.h @@ -171,7 +171,7 @@ enum svga_stats_time { SVGA_STATS_PREFIX "SamplerView", \ SVGA_STATS_PREFIX "SurfaceWriteFlush", \ SVGA_STATS_PREFIX "TextureReadback", \ - SVGA_STATS_PREFIX "VertexElement" \ + SVGA_STATS_PREFIX "VertexElement" #define SVGA_STATS_TIME_NAMES \ SVGA_STATS_PREFIX "BuffersFlush", \ diff --git a/src/gallium/drivers/swr/rasterizer/memory/ClearTile.cpp b/src/gallium/drivers/swr/rasterizer/memory/ClearTile.cpp index 8a306cdce5a..98bf28b21d1 100644 --- a/src/gallium/drivers/swr/rasterizer/memory/ClearTile.cpp +++ b/src/gallium/drivers/swr/rasterizer/memory/ClearTile.cpp @@ -283,7 +283,7 @@ void SwrStoreHotTileClear( sStoreTilesClearColorTable[B10G10R10A2_UINT] = StoreMacroTileClear<R32G32B32A32_FLOAT, B10G10R10A2_UINT>::StoreClear; \ sStoreTilesClearColorTable[B10G10R10A2_SINT] = StoreMacroTileClear<R32G32B32A32_FLOAT, B10G10R10A2_SINT>::StoreClear; \ sStoreTilesClearColorTable[R8G8B8_UINT] = StoreMacroTileClear<R32G32B32A32_FLOAT, R8G8B8_UINT>::StoreClear; \ - sStoreTilesClearColorTable[R8G8B8_SINT] = StoreMacroTileClear<R32G32B32A32_FLOAT, R8G8B8_SINT>::StoreClear; \ + sStoreTilesClearColorTable[R8G8B8_SINT] = StoreMacroTileClear<R32G32B32A32_FLOAT, R8G8B8_SINT>::StoreClear; ////////////////////////////////////////////////////////////////////////// /// INIT_STORE_TILES_TABLE - Helper macro for setting up the tables. @@ -293,7 +293,7 @@ void SwrStoreHotTileClear( sStoreTilesClearDepthTable[R32_FLOAT] = StoreMacroTileClear<R32_FLOAT, R32_FLOAT>::StoreClear; \ sStoreTilesClearDepthTable[R32_FLOAT_X8X24_TYPELESS] = StoreMacroTileClear<R32_FLOAT, R32_FLOAT_X8X24_TYPELESS>::StoreClear; \ sStoreTilesClearDepthTable[R24_UNORM_X8_TYPELESS] = StoreMacroTileClear<R32_FLOAT, R24_UNORM_X8_TYPELESS>::StoreClear; \ - sStoreTilesClearDepthTable[R16_UNORM] = StoreMacroTileClear<R32_FLOAT, R16_UNORM>::StoreClear; \ + sStoreTilesClearDepthTable[R16_UNORM] = StoreMacroTileClear<R32_FLOAT, R16_UNORM>::StoreClear; ////////////////////////////////////////////////////////////////////////// /// @brief Sets up tables for ClearTile diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h index a0b8fb66dd6..5b2ce32ae40 100644 --- a/src/intel/compiler/brw_inst.h +++ b/src/intel/compiler/brw_inst.h @@ -88,7 +88,7 @@ brw_inst_##name(const struct gen_device_info *devinfo, \ } else { \ high = hi4; low = lo4; \ } \ - assert(((int) high) != -1 && ((int) low) != -1); \ + assert(((int) high) != -1 && ((int) low) != -1); /* A general macro for cases where the field has moved to several different * bit locations across generations. GCC appears to combine cases where the diff --git a/src/mesa/drivers/dri/r200/r200_vertprog.c b/src/mesa/drivers/dri/r200/r200_vertprog.c index 100b715f9b0..bb8550332b3 100644 --- a/src/mesa/drivers/dri/r200/r200_vertprog.c +++ b/src/mesa/drivers/dri/r200/r200_vertprog.c @@ -350,7 +350,7 @@ static unsigned long op_operands(enum prog_opcode opcode) ((t_src_class(a.File) == VSF_IN_CLASS_PARAM && \ t_src_class(b.File) == VSF_IN_CLASS_PARAM) || \ (t_src_class(a.File) == VSF_IN_CLASS_ATTR && \ - t_src_class(b.File) == VSF_IN_CLASS_ATTR))) \ + t_src_class(b.File) == VSF_IN_CLASS_ATTR))) /* fglrx on rv250 codes up unused sources as follows: unused but necessary sources are same as previous source, zero-ed out. diff --git a/src/mesa/drivers/x11/xmesaP.h b/src/mesa/drivers/x11/xmesaP.h index 6cd020f2ed3..9320442f46a 100644 --- a/src/mesa/drivers/x11/xmesaP.h +++ b/src/mesa/drivers/x11/xmesaP.h @@ -249,7 +249,7 @@ struct xmesa_buffer { #define PACK_TRUECOLOR( PIXEL, R, G, B ) \ PIXEL = xmesa->xm_visual->RtoPixel[R] \ | xmesa->xm_visual->GtoPixel[G] \ - | xmesa->xm_visual->BtoPixel[B]; \ + | xmesa->xm_visual->BtoPixel[B]; /** diff --git a/src/mesa/math/m_debug_util.h b/src/mesa/math/m_debug_util.h index 25ee029cebc..4959785093e 100644 --- a/src/mesa/math/m_debug_util.h +++ b/src/mesa/math/m_debug_util.h @@ -216,7 +216,7 @@ extern char *mesa_profile; x = LONG_MAX; \ for ( cycle_i = 0 ; cycle_i < 10 ; cycle_i++ ) { \ unsigned long cycle_tmp1, cycle_tmp2; \ - rdtscll(cycle_tmp1); \ + rdtscll(cycle_tmp1); #define END_RACE(x) \ rdtscll(cycle_tmp2); \ diff --git a/src/mesa/sparc/sparc_matrix.h b/src/mesa/sparc/sparc_matrix.h index f677d9bda13..6ef0acde69e 100644 --- a/src/mesa/sparc/sparc_matrix.h +++ b/src/mesa/sparc/sparc_matrix.h @@ -151,7 +151,7 @@ #define LDMATRIX_0_5_10(BASE) \ ld [BASE + ( 0 * 0x4)], M0; \ ld [BASE + ( 5 * 0x4)], M5; \ - ld [BASE + (10 * 0x4)], M10; \ + ld [BASE + (10 * 0x4)], M10; #define LDMATRIX_0_5_10_12_13_14(BASE) \ ld [BASE + ( 0 * 0x4)], M0; \ diff --git a/src/mesa/x86/mmx_blend.S b/src/mesa/x86/mmx_blend.S index eeaf43ea937..df736cdaa59 100644 --- a/src/mesa/x86/mmx_blend.S +++ b/src/mesa/x86/mmx_blend.S @@ -235,7 +235,7 @@ TWO(PUNPCKHWD ( MA2, MA2 )) /* pa2 | pa2 | | TWO(PUNPCKHDQ ( MA2, MA2 )) /* pa2 | pa2 | pa2 | pa2 */ #define GMB_PACK( MS1, MS2 ) \ - PACKUSWB ( MS2, MS1 ) /* sa2 | sb2 | sg2 | sr2 | sa1 | sb1 | sg1 | sr1 */ ;\ + PACKUSWB ( MS2, MS1 ) /* sa2 | sb2 | sg2 | sr2 | sa1 | sb1 | sg1 | sr1 */ ; #define GMB_STORE(rgba, MSS ) \ ONE(MOVD ( MSS, REGIND(rgba) )) /* | | | | sa1 | sb1 | sg1 | sr1 */ ;\ diff --git a/src/mesa/x86/read_rgba_span_x86.S b/src/mesa/x86/read_rgba_span_x86.S index 5def1f859ed..0b94f024ec2 100644 --- a/src/mesa/x86/read_rgba_span_x86.S +++ b/src/mesa/x86/read_rgba_span_x86.S @@ -65,7 +65,7 @@ movl (%ebx), %eax ; \ bswap %eax /* ARGB -> BGRA */ ; \ rorl $8, %eax /* BGRA -> ABGR */ ; \ - movl %eax, (%ecx) /* ABGR -> R, G, B, A */ ; \ + movl %eax, (%ecx) /* ABGR -> R, G, B, A */ ; /** |