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author | Tom Stellard <thomas.stellard@amd.com> | 2013-03-13 12:59:33 -0400 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2013-04-05 18:43:34 -0400 |
commit | 4f7fe2cf2cb16ac27ea0f6cc0da84ee2c64c3754 (patch) | |
tree | 0d60af213b38b0d125075e80ae5bc21968f0df13 | |
parent | 0ccf82c557b516c446b4caeed723f260927e075b (diff) |
radeonsi: Set TCL1_ACTION_ENA when invalidating the texture cache
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com
-rw-r--r-- | src/gallium/drivers/radeonsi/radeonsi_pm4.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pm4.c b/src/gallium/drivers/radeonsi/radeonsi_pm4.c index e7441fed82a..526f087bb90 100644 --- a/src/gallium/drivers/radeonsi/radeonsi_pm4.c +++ b/src/gallium/drivers/radeonsi/radeonsi_pm4.c @@ -137,6 +137,7 @@ void si_pm4_inval_shader_cache(struct si_pm4_state *state) void si_pm4_inval_texture_cache(struct si_pm4_state *state) { state->cp_coher_cntl |= S_0085F0_TC_ACTION_ENA(1); + state->cp_coher_cntl |= S_0085F0_TCL1_ACTION_ENA(1); } void si_pm4_inval_fb_cache(struct si_pm4_state *state, unsigned nr_cbufs) |